ICS9DBL411 Datasheet, PDF (1/9 Pages) Integrated Device Technology – Four Output Differential Fanout Buffer for PCI Express Gen 1 & 2

DATASHEET
Four Output Differential Fanout Buffer for
PCI Express Gen 1 & 2
ICS9DBL411
Recommended Application:
PCI-Express fanout buffer
Output Features:
• 4 - low power differential output pairs
• Individual OE# control of each output pair
Key Specifications:
• Output cycle-cycle jitter < 25ps additive
• Output to output skew: < 50ps
Features/Benefits:
• Low power differential fanout buffer for PCI-
Express and CPU clocks
• 20-pin MLF or TSSOP packaging
General Description:
The ICS9DBL411 is a 4 output lower power
differential buffer. Each output has its own OE#
pin. It has a maximum input frequency of 400 MHz.
Power Groups
Pin Number (TSSOP)
VDD
GND
9,18
10,17
4
5
Pin Number (MLF)
VDD
GND
6,15
7,14
1
2
Description
DIF(3:0)
Analog VDD & GND
Description
DIF(3:0)
Analog VDD & GND
Funtional Block Diagram
4
OE#(3:0)
DIF_INT
DIF_INC
4
STOP
LOGIC
DIF_LPR(3:0)
IDT^TM/ICS^TM Four Output Differential Buffer for PCI Express
1
1250A—07/31/07