ICS853S004I Datasheet, PDF (1/20 Pages) Integrated Device Technology – Low Skew, 1-to-4, Differential-to-2.5V, 3.3V LVPECL Fanout Buffer

Low Skew, 1-to-4, Differential-to-2.5V, 3.3V
LVPECL Fanout Buffer
ICS853S004I
DATA SHEET
General Description
The ICS853S004I is a low skew, high performance 1-to-4, 2.5V/3.3V
Differential-to-LVPECL Fanout Buffer. Guaranteed output and
part-to-part skew characteristics make the ICS853S004I ideal for
those applications demanding well defined performance and
repeatability.
Features
• Four differential LVPECL outputs
• Differential LVPECL clock input pair
• PCLK, nPCLK pair can accept the following
differential input levels: LVPECL, LVDS, CML
• Maximum output frequency: 2GHz
• Output skew: 25ps (maximum)
• Part-to-part skew: 100ps (maximum)
• Propagation delay: 500ps (maximum)
• Additive Phase Jitter, RMS: 0.10ps (maximum) @156.25MHz
(12kHz - 20MHz)
• Clock enable signal synchronized to eliminate runt clock pulses
• LVPECL mode operating voltage supply range:
V_CC = 2.375V to 3.8V, V_EE = 0V
• -40°C to 85°C ambient operating temperature
Block Diagram
Pin Assignment
ICS853S004AKI May 27, 2017
ICS853S004I
16-Lead VFQFN
Top View
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