9ZML1232 Datasheet, PDF (1/19 Pages) Integrated Device Technology – 2:12 LOW POWER DIFFERENTIAL Z-BUFFER MUX FOR PCIE AND QPI/UPI

2:12 LOW POWER DIFFERENTIAL Z-BUFFER MUX FOR PCIE AND QPI/UPI
DATASHEET
9ZML1232
General Description
The 9ZML1232 is a 2-input/12-output differential mux for
use in servers. It meets the demanding DB1200ZL
performance specifications and utilizes Low-Power
HCSL-compatible outputs to reduce power consumption
and termination components. It is suitable for PCI-Express
Gen1/2/3 or QPI/UPI applications, and uses a fixed external
feedback to maintain low drift for demanding QPI
applications.
Recommended Application
Clock Mux for Romley, Grantley and Purley Servers
Output Features
• 12 - Low-Power (LP) HCSL Output Pairs
Block Diagram
y
Features/Benefits
• Fixed feedback path; 0ps input-to-output delay
• 9 Selectable SMBus addresses; multiple devices can
share same SMBus segment
• Separate VDDIO for outputs; allows maximum power
savings
• PLL or bypass mode; PLL can dejitter incoming clock
• Hardware or Software-selectable PLL BW; minimizes
jitter peaking in downstream PLL's
• Spread spectrum compatible; tracks spreading input
clock for EMI reduction
• SMBus Interface; unused outputs can be disabled
• Differential outputs are Low/Low in power down;
maximum power savings
Key Specifications
• Cycle-to-cycle jitter <50ps
• Output-to-output skew <65 ps
• Input-to-output delay: Fixed at 0 ps
• Input-to-output delay variation <50ps
• Phase jitter: PCIe Gen3 <1ps rms
• Phase jitter: QPI/UPI 9.6GB/s <0.2ps rms
y
OE(11:0)#
DIF_INB
DIF_INB#
DIF_INA
DIF_INA#
HIBW_BYPM_LOBW#
SEL_A_B#
CKPWRGD/PD#
SMB_A0_tri
SMB_A1_tri
SMBDAT
SMBCLK
Logic
Z-PLL
(SS Compatible)
FBOUT_NC
DIF(11:0)
IDT® 2:12 LOW POWER DIFFERENTIAL Z-BUFFER MUX FOR PCIE AND QPI/UPI
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9ZML1232
REV E 112015