89HPES24NT24G2 Datasheet, PDF (1/35 Pages) Integrated Device Technology – Supports 128 Bytes to 2 KB maximum payload size

24-Lane 24-Port PCIe® Gen2
System Interconnect Switch
®
89HPES24NT24G2
Datasheet
Device Overview
The 89HPES24NT24G2 is a member of the IDT family of PCI
Express® switching solutions. The PES24NT24G2 is a 24-lane, 24-port
system interconnect switch optimized for PCI Express Gen2 packet
switching in high-performance applications, supporting multiple simulta-
neous peer-to-peer traffic flows. Target applications include multi-host or
intelligent I/O based systems where inter-domain communication is
required, such as servers, storage, communications, and embedded
systems.
Features
 _{High Performance Non-Blocking Switch Architecture}
– 24-lane, 24-port PCIe switch with flexible port configuration
– Integrated SerDes supports 5.0 GT/s Gen2 and 2.5 GT/s
Gen1 operation
– Delivers up to 24 GBps (192 Gbps) of switching capacity
– Supports 128 Bytes to 2 KB maximum payload size
– Low latency cut-through architecture
– Supports one virtual channel and eight traffic classes
 _{Port Configurability}
– Twenty-four x1 ports configurable as follows:
• One x8 stack
• Eight x1 ports (ports 0 through 7 are not capable of
merging with an adjacent port)
• Two x8 stacks configurable as:
• Two x8 ports
• Four x4 ports
• Eight x2 ports
• Sixteen x1 ports
– Automatic per port link width negotiation
(x8  x4 x2  x1)
– Crosslink support
– Automatic lane reversal
– Per lane SerDes configuration
• De-emphasis
• Receive equalization
• Drive strength
 _{Innovative Switch Partitioning Feature}
– Supports up to 8 fully independent switch partitions
– Logically independent switches in the same device
– Configurable downstream port device numbering
– Supports dynamic reconfiguration of switch partitions
• Dynamic port reconfiguration — downstream, upstream,
non-transparent bridge
• Dynamic migration of ports between partitions
• Movable upstream port within and between switch partitions
 _{Non-Transparent Bridging (NTB) Support}
– Supports up to 8 NT endpoints per switch, each endpoint can
communicate with other switch partitions or external PCIe
domains or CPUs
– 6 BARs per NT Endpoint
• Bar address translation
• All BARs support 32/64-bit base and limit address translation
• Two BARs (BAR2 and BAR4) support look-up table based
address translation
– 32 inbound and outbound doorbell registers
– 4 inbound and outbound message registers
– Supports up to 64 masters
– Unlimited number of outstanding transactions
 _Multicast
– Compliant with the PCI-SIG multicast
– Supports 64 multicast groups
– Supports multicast across non-transparent port
– Multicast overlay mechanism support
– ECRC regeneration support
 _{Integrated Direct Memory Access (DMA) Controllers}
– Supports up to 2 DMA upstream ports, each with 2 DMA chan-
nels
– Supports 32-bit and 64-bit memory-to-memory transfers
• Fly-by translation provides reduced latency and increased
performance over buffered approach
• Supports arbitrary source and destination address alignment
• Supports intra- as well as inter-partition data transfers using
the non-transparent endpoint
– Supports DMA transfers to multicast groups
– Linked list descriptor-based operation
– Flexible addressing modes
• Linear addressing
• Constant addressing
 _{Quality of Service (QoS)}
– Port arbitration
• Round robin
– Request metering
• IDT proprietary feature that balances bandwidth among
switch ports for maximum system throughput
– High performance switch core architecture
• Combined Input Output Queued (CIOQ) switch architecture
with large buffers
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
 2013 Integrated Device Technology, Inc
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December 17, 2013