879893 Datasheet, PDF (1/16 Pages) Integrated Device Technology – Low Skew, 1-to-12 (IDCS) LVCMOS/LVTTL Clock Generator

Low Skew, 1-to-12 (IDCS)
LVCMOS/LVTTL Clock Generator
879893
Datasheet
General Description
The 879893 is a PLL clock driver designed specifically for redun-
dant clock tree designs. The device receives two LVCMOS/LVTTL
clock signals from which it generates 12 new LVCMOS/LVTTL
clock outputs. External PLL feedback is used to also provide zero
delay buffer performance.
The 879893 Intelligent Dynamic Clock Switch (IDCS) circuit
continuously monitors both input CLK signals. Upon detection of a
failure (CLK stuck HIGH or LOW for at least 1 period), the
nALARM for that CLK will be latched (LOW). If that CLK is the
primary clock, the IDCS will switch to the good secondary clock
and phase/frequency alignment will occur with minimal output
phase disturbance.
Features
• Twelve LVCMOS/LVTTL outputs (two banks of six outputs);
One QFB feedback clock output
• Selectable CLK0 or CLK1 LVCMOS/LVTTL clock inputs
• CLK0, CLK1 supports the following input types:
LVCMOS, LVTTL
• Automatically detects clock failure
• IDCS on-chip intelligent dynamic clock switch
• Maximum output frequency: 200MHz
• Output skew: 50ps (maximum), within bank
• Cycle-to-cycle (FSEL3=0, V_DD=3.3V±5%): 150ps (maximum)
• Smooth output phase transition during clock fail-over switch
• Full 3.3V or 2.5V supply modes
• -40°C to 85°C ambient operating temperature
• Available in lead-free (RoHS 6) package
• For functional replacement part use 87973i
Simplified Block Diagram
nOE/MR ^Pulldown
CLK0 ^Pulldown 0
CLK1 ^{Pulldown 1}
FB
REF_SEL ^Pulldown
nMAN/A ^Pullup
nALARM_RST ^Pullup
nPLL_EN ^Pulldown
1
REF
PLL
0
VCO RANGE
240MHz - 500MHz
FB
IDCS
FSEL[0:2] ^Pulldown
FSEL3 ^Pulldown
FSEL0 FSEL1 FSEL2 QA
0
0
0 ÷2
0
0
1 ÷2
0
1
0 ÷2
0
1
1 ÷4
1
0
0 ÷2
1
0
1 ÷16
1
1
0 ÷8
1
1
1 ÷4
0
÷2 1
FSEL0 FSEL1 FSEL2 QB
0
0
0 ÷16
0
0
1 ÷8
0
1
0 ÷6
0
1
1 ÷8
1
0
0 ÷4
1
0
1 ÷16
1
1
0 ÷8
1
1
1 ÷4
6
DQ
6
DQ
DQ
QA0:QA5
QB0:QB5
QFB
nALARM0
nALARM1
CLK_IND
Pin Assignment
GND
QA0
QA1
VDD
GND
QA2
QA3
VDD
GND
QA4
QA5
VDD
36 35 34 33 32 31 30 29 28 27 26 25
37
24
38
23
39
22
40
21
41
20
42
19
43
18
44
17
45
16
46
15
47
14
48
13
1 2 3 4 5 6 7 8 9 10 11 12
GND
QB0
QB1
VDD
GND
QB2
QB3
VDD
GND
QB4
QB5
VDD
879893
48-Lead LQFP
7mm x 7mm x 1.4mm package body
Y Package
Top View
©2017 Integrated Device Technology, Inc.
1
Revision B, January 10, 2017