ICS9DB202 Datasheet, PDF (9/11 Pages) Integrated Circuit Systems – Two 0.7V current mode differential HCSL output pairs, 1 differential clock input

Integrated
Circuit
Systems, Inc.
RELIABILITY INFORMATION
ICS9DB202
PCI EXPRESS™
JITTER ATTENUATOR
TABLE 6A. θ_JAVS. AIR FLOW TABLE FOR 20 LEAD TSSOP PACKAGE
θ_JA by Velocity (Linear Feet per Minute)
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
0
114.5°C/W
73.2°C/W
200
98°C/W
66.6°C/W
500
88°C/W
63.5°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
TABLE 6B. θ_JAVS. AIR FLOW TABLE FOR 20 LEAD SSOP PACKAGE
θ_JA by Velocity (Linear Feet per Minute)
Multi-Layer PCB, JEDEC Standard Test Boards
0
80.8°C/W
200
73.2°C/W
500
69.2°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
TRANSISTOR COUNT
The transistor count for ICS9DB202 is: 2471
9DB202CG
www.icst.com/products/hiperclocks.html
9
REV. A OCTOBER 6, 2004