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ICS954119 Datasheet, PDF (9/17 Pages) Integrated Circuit Systems – Programmable Timing Control Hub™ for Next Gen P4™ processor
Integrated
Circuit
Systems, Inc.
ICS954119
Advance Information
I2C Table: M/N Programming & WD Safe Frequency Control Register
Byte 10
Pin #
Name
Control Function
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
M/N_EN
Reserved
WD Safe Freq Source
WD SF4
WD SF3
WD SF2
WD SF1
WD SF0
PLL1 M/N
Programming Enable
Reserved
WD Safe Freq Source
Watch Dog Safe Freq
Programming bits
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
Disable
-
B10b(4:0)
1
Enable
-
Latch Inputs
Writing to these bit will configure the safe frequency as Byte0 bit
(4:0).
PWD
0
0
0
0
0
0
0
0
I2C Table: PLL1 Frequency Control Register
Byte 11
Pin #
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
Name
N Div8
N Div9
M Div5
M Div4
M Div3
M Div2
M Div1
M Div0
Control Function
N Divider Prog bit 8
N Divider Prog bit 9
M Divider Programming
bit (5:0)
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
1
The decimal representation of M and N Divier in Byte 11 and 12
will configure the PLL1 VCO frequency. Default at power up =
latch-in or Byte 0 Rom table. VCO Frequency = 14.318 x
[NDiv(9:0)+8] / [MDiv(5:0)+2]
PWD
X
X
X
X
X
X
X
X
I2C Table: PLL1 Frequency Control Register
Byte 12
Pin #
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
Name
N Div7
N Div6
N Div5
N Div4
N Div3
N Div2
N Div1
N Div0
I2C Table: PLL1 Spread Spectrum Control Register
Byte 13
Pin #
Name
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
SSP7
SSP6
SSP5
SSP4
SSP3
SSP2
SSP1
SSP0
I2C Table: PLL1 Spread Spectrum Control Register
Byte 14
Pin #
Name
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
Reserved
SSP14
SSP13
SSP12
SSP11
SSP10
SSP9
SSP8
0875—05/24/04
Control Function
N Divider Programming
Byte12 bit(7:0) and
Byte11 bit(7:6)
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
1
The decimal representation of M and N Divier in Byte 11 and 12
will configure the PLL1 VCO frequency. Default at power up =
latch-in or Byte 0 Rom table. VCO Frequency = 14.318 x
[NDiv(9:0)+8] / [MDiv(5:0)+2]
PWD
X
X
X
X
X
X
X
X
Control Function
Spread Spectrum
Programming bit(7:0)
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
1
These Spread Spectrum bits in Byte 13 and 14 will program the
spread pecentage of PLL1
PWD
X
X
X
X
X
X
X
X
Control Function
Reserved
Spread Spectrum
Programming bit(14:8)
Type
R
RW
RW
RW
RW
RW
RW
RW
0
1
-
-
These Spread Spectrum bits in Byte 13 and 14 will program the
spread pecentage of PLL1
PWD
0
X
X
X
X
X
X
X
9