ICS85320I Datasheet, PDF (9/14 Pages) Integrated Circuit Systems – LVCMOS / LVTTL-TO-DIFFERENTIAL 2.5V / 3.3V LVPECL TRANSLATOR

Integrated
Circuit
Systems, Inc.
ICS85320I
LVCMOS / LVTTL-TO-DIFFERENTIAL
2.5V / 3.3V LVPECL TRANSLATOR
APPLICATION SCHEMATIC EXAMPLE
Figure 3 shows an example of ICS85320I application schematic.
In this example, the device is operated at V_CC=3.3V. The
decoupling capacitor should be located as close as possible to
the power pin. For LVPECL output termination, only two termi-
nations examples are shown in this schematic. For more termi-
nation approaches, please refer to the LVPECL Termination Ap-
plication Note.
U1
1
2
3
4
nc
Q
nQ
nc
VCC = 3.3V
Vcc
Clk
nc
Vee
8
7
6
5
85320
Clk_in
Zo = 50 Ohm
Zo = 50 Ohm
R2
R1
50
50
R3
50
VCC (U1-8)
C1
10uf
C2
0.1uF
VCC = 3.3V
R4
133
Zo = 50 Ohm
R6
133
+
Zo = 50 Ohm
-
R5
R7
82.5
82.5
Optional Termination
FIGURE 3. ICS85320I APPLICATION SCHEMATIC EXAMPLE
85320AMI
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9
REV. A AUGUST 25, 2004