ICS149317 Datasheet, PDF (9/11 Pages) Integrated Circuit Systems – Clock Synthesizer for Portable Systems

PRELIMINARY INFORMATION
ICS1493-17
Clock Synthesizer for Portable Systems
Byte 1: Control Register
Bit
@Pup
7
1
Name
REF
6
1
37SS
5
1
4
1
3
0
48M
22/24M
22M
2
1
1
1
0
1
Reserved
Reserved
22/24M SEL
Byte 2: Control Register
Bit
@Pup
7
0
6
0
5
0
4
0
3
0
2
0
Name
Reserved
Reserved
Reserved
Reserved
Reserved
SS Table
1
1
SS Table
0
0
SS Table
Description
REF Output Enable
0 = Disable, Output pulled low, 1 = Enable
37SS Output Enable
0 = Disable, Output pulled low, corresponding PLL shut off.
1 = Enable
48M Output Enable
0 = Disable, Output pulled low, 1 = Enable
22/24M Clock Output Enable
0 = Disable, Output pulled low, 1 = Enable
22M Output Enable
0 = Disable, Output pulled low and corresponding PLL off,
1 = Enable
Reserved
Reserved
22/24M Clock Select
1 = 24.576 MHz, 0 = 22.5792 MHz
Description
Reserved
Reserved
Reserved
Reserved
Reserved
Bit 2:0=000: No Spread
Bit 2:0=001: -0.5% Spread
Bit 2:0=010:-1.0% Spread
Bit 2:0=011: No Spread
Bit 2:0=100: -2.0% Spread
Bit 2:0=101: No Spread
Bit 2:0=110: -3.0% Spread
Bit 2:0=111: No Spread
MDS 1493-17 A
9
Revision 101005
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