ICS149317 Datasheet, PDF (7/11 Pages) Integrated Circuit Systems – Clock Synthesizer for Portable Systems

PRELIMINARY INFORMATION
ICS1493-17
Clock Synthesizer for Portable Systems
Serial Data Interface
Data Protocol
The clock driver serial protocol accepts byte write, byte read, block write, and block read operations from the
controller. For block write/read operation, the bytes must be accessed in sequential order from lowest to highest
byte (most significant bit first) with the ability to stop after any complete byte has been transferred. For byte write
and byte read operations, the system controller can access individually indexed bytes. The offset of the indexed
byte is encoded in the command code, as described in the following table.
Bit
7
(6:0)
Description
0 = Block read or block write operation, 1 = Byte read or byte write operation
Byte offset for byte read or byte write operation. For block read or block write operations,
these bits should be '0000000'.
The block write and block read protocol is outlined in the table below, followed by the corresponding byte write and
byte read protocol. The slave receiver address is 11010010 (D2h).
Bit
1
2:8
9
10
11:18
19
20:27
28
29:36
37
38:45
46
....
....
....
....
....
....
Block Write Protocol
Description
Start
Slave address - 7 bits
Write = 0
Acknowledge from slave
Command code — 8 bit
‘00000000’ stands for block operation
Acknowledge from slave
Byte count — 8 bits
Acknowledge from slave
Data byte 0 — 8 bits
Acknowledge from slave
Data byte 1 — 8 bits
Acknowledge from slave
.............................
Data byte (N-1) — 8 bits
Acknowledge from slave
Data byte N — 8 bits
Acknowledge from slave
Stop
Bit
1
2:8
9
10
11:18
19
20
21:27
28
29
30:37
38
39:46
47
48:55
56
....
....
....
Block Read Protocol
Description
Start
Slave address - 7 bits
Write = 0
Acknowledge from slave
Command code - 8 bit
‘00000000’ stands for block operation
Acknowledge from slave
Repeat start
Slave address — 7 bits
Read = 1
Acknowledge from slave
Byte count from slave — 8 bits
Acknowledge from master
Data byte from slave — 8 bits
Acknowledge from master
Data byte from slave — 8 bits
Acknowledge from master
Data byte N from slave — 8 bits
Not Acknowledge from master
Stop
MDS 1493-17 A
7
Revision 101005
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