ICS951411 Datasheet, PDF (8/19 Pages) Integrated Circuit Systems – System Clock Chip for ATI RS400 P4TM-based Systems

Integrated
Circuit
Systems, Inc.
ICS951411
SMBus Table: Frequency Select Register
Byte 0 Pin #
Name
Control Function Type
0
1
PWD
Bit 7
-
FS Source
Latched Input or SMBus
Frequency Select
RW
Latched
Inputs
SMBus
0
Bit 6
-
SS_EN
Spread Enable
RW
OFF
ON
0
Bit 5
-
Reserved
Reserved
RW Reserved Reserved
X
Bit 4
-
CK410#
CPU Freq Select Bit 4 RW
Latched
Bit 3
-
Bit 2
-
Bit 1
-
CPU FS3
CPU FS_C
CPU FS_B
CPU SS_EN
CPU Freq Select Bit 2
CPU Freq Select Bit 1
RW
See Table 1: CPU
0
RW _{Frequency Selection Table} Latched
RW
Latched
Bit 0
-
CPU FS_A
CPU Freq Select Bit 0 RW
Latched
NOTE: Byte 0 bit 6 and Byte 0 bit 3 must BOTH be '1' to enable spread for the PCI $ CPU clocks.
Byte 5 bit 4 must be set to 1 to enable spread for the SRC & ATIGCLKS.
SMBus Table: Output Control Register
Byte 1 Pin #
Name
Bit 7
50
PCICLK0
Bit 6
41,40
CPUCLK2
Bit 5
4
USB_48MHz
Bit 4
54
REF0
Bit 3
53
REF1
Bit 2
52
REF2
Bit 1
47,46
CPUCLK0
Bit 0
43,42
CPUCLK1
Control Function
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Output Enable
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
Disable
Disable
Disable
Disable
Disable
Disable
Disable
Disable
1
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
PWD
1
1
1
1
1
1
1
1
SMBus Table: CLKREQB# Output Control Register
Byte 2 Pin #
Name
Control Function Type
0
Bit 7
12,13
REQBSRC7
CLKREQB# Controls
SRC7
RW
Does not
control
Bit 6
16,17
REQBSRC6
CLKREQB# Controls
SRC6
RW
Does not
control
Bit 5
18,19
REQBSRC5
CLKREQB# Controls
SRC5
RW
Does not
control
Bit 4
22,23
REQBSRC4
CLKREQB# Controls
SRC4
RW
Does not
control
Bit 3
24,25
REQBSRC3
CLKREQB# Controls
SRC3
RW
Does not
control
Bit 2
-
Reserved
Reserved
RW Reserved
Bit 1
-
Reserved
Reserved
RW Reserved
Bit 0
34,33
REQBSRC0
CLKREQB# Controls
SRC0
RW
Does not
control
NOTE: CPU0_Stop_En (Byte2, bit 2) only exists in devices with REV ID = 2 or higher
1
Controls
Controls
Controls
Controls
Controls
Reserved
Reserved
Controls
PWD
0
0
0
0
0
X
X
0
0891E—03/07/05
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