ICS843051 Datasheet, PDF (8/15 Pages) Integrated Circuit Systems – FEMTOCLOCKS CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR

Integrated
Circuit
Systems, Inc.
ICS843051
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS843051 provides sepa-
rate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V_CC, and V_CCA should
be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required. Figure 1 illustrates how
a 10Ω resistor along with a 10µF and a .01µF bypass
capacitor should be connected to each V_CCA pin.
V_CC
V_CCA
3.3V
.01µF 10Ω
.01µF
10µF
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
The ICS843051 has been characterized with 18pF parallel
resonant crystals. The capacitor values, C1 and C2, shown in
Figure 2 below were determined using a 26.04167MHz, 18pF
parallel resonant crystal and were chosen to minimize the ppm
error. The optimum C1 and C2 values can be slightly adjusted
for different board layouts.
X1
18pF Parallel Crystal
XTAL_OUT
C1
33p
XTAL_IN
C2
27p
Figure 2. CRYSTAL INPUt INTERFACE
843051AG
www.icst.com/products/hiperclocks.html
8
REV. A DECEMBER 14, 2004