ICS9148-12 Datasheet, PDF (7/18 Pages) Integrated Circuit Systems – Pentium/ProTM System Clock Chip

ICS9148-12
Select Functions
Functionality
Tristate
Testmode
CPU
HI - Z
TCLK/2¹
PCI,
PCI_F
HI - Z
TCLK/4¹
SDRAM
HI - Z
TCLK/2¹
REF
HI - Z
TCLK¹
IOAPIC
HI - Z
TCLK¹
24 MHz
Selection
HI - Z
TCLK/4¹
48 MHz
Selection
HI - Z
TCLK/2¹
Notes:
1. TCLK is a test clock driven on the X1 (crystal in pin) input during test mode.
Serial Configuration Command Bitmaps
Byte 0: Functional and Frequency Select Clock Register (default on Bits 7, 6, 5, 4, 1, 0 = 0)
Note: PWD = Power-Up Default
(default on Bits 3, 2 = 1)
BIT
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PIN#
-
-
-
23
22
-
DESCRIPTION
Reserved
Must be 0 for normal operation
In Spread Spectrum, Controls type
(0=centered, 1=down spread)
In Spread Spectrum, Controls Spreading
(0=1.8% 1=0.6%)
48/24 MHz (Frequency Select) 1=48 MHz, 0=24 MHz
48/24 MHz (Frequency Select) 1=48 MHz, 0=24 MHz
Bit1 Bit0
1
1 - Tri-State
1
0 - Spread Spectrum Enable
0
1 - Testmode
0
0 - Normal operation
PWD
0
0
0
0
1
1
0
0
7