ICS844021I-01 Datasheet, PDF (7/10 Pages) Integrated Circuit Systems – FEMTOCLOCKS™ CRYSTAL-TO- LVDS CLOCK GENERATOR

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS844021I-01
FEMTOCLOCKS™ CRYSTAL-TO- LVDS
CLOCK GENERATOR
3.3V, 2.5V LVDS DRIVER TERMINATION
A general LVDS interface is shown in Figure 3. In a 100Ω
differential transmission line environment, LVDS drivers
require a matched load termination of 100Ω across near
the receiver input. For a multiple LVDS outputs buffer, if only
partial outputs are used, it is recommended to terminate the
un-used outputs.
VDD
LVDS
3.3V or 2.5V
+
R1
100
-
100 Ω Differential Transmission
FIGURE 3. TYPICAL LVDS DRIVER TERMINATION
844021AGI-01
www.icst.com/products/hiperclocks.html
7
REV. A MARCH 29, 2005