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ICS840021I Datasheet, PDF (7/11 Pages) Integrated Circuit Systems – FEMTOCLOCKS™ CRYSTAL-TO LVCMOS/LVTTL FREQUENCY SYNTHESIZER
Integrated
Circuit
Systems, Inc.
ICS840021I
FEMTOCLOCKS™ CRYSTAL-TO-
LVCMOS/LVTTL CLOCK GENERATOR
APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins are
vulnerable to random noise.The ICS840021I provides separate
power supplies to isolate any high switching noise from the out-
puts to the internal PLL.VDD and VDDA should be individually con-
nected to the power supply plane through vias, and bypass ca-
pacitors should be used for each pin. To achieve optimum
jitter performance, power supply isolation is required. Figure 1
illustrates how a 10Ω resistor along with a 10μF and a .01μF
bypass capacitor should be connected to each VDDA pin.
VDD
VDDA
3.3V or 2.5V
.01μF 10 Ω
.01μF
10μF
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
The ICS840021I has been characterized with 18pF parallel
resonant crystals. The capacitor values, C1 and C2, shown in
Figure 2 below were determined using a 25MHz, 18pF parallel
resonant crystal and were chosen to minimize the ppm error.
The optimum C1 and C2 values can be slightly adjusted for
different board layouts.
X1
18pF Parallel Crystal
XTAL_OUT
C1
33p
XTAL_IN
C2
22p
Figure 2. CRYSTAL INPUt INTERFACE
840021AGI
www.icst.com/products/hiperclocks.html
7
REV. A MAY 19, 2005