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ICS95V842I Datasheet, PDF (6/9 Pages) Integrated Circuit Systems – DDR Phase Lock Loop Clock Driver (60MHz - 220MHz) | |||
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ICS95V842I
Parameter Measurement Information
VDD
V(CLKC)
R = 60â¦
VDD/2
ICS95V842
R = 60⦠VDD/2
ICS95V842
V(CLKC)
GND
Figure 1. IBIS Model Output Load
Z = 60â¦
C = 14 pF -VDD/2
R = 10⦠Z = 50â¦
Z = 60â¦
R = 10⦠Z = 50â¦
SCOPE
R = 50â¦
V(TT)
C = 14 pF
-VDD/2
-VDD/2
NOTE: V(TT) = GND
Figure 2. Output Load Test Circuit
R = 50â¦
V(TT)
YX, FB_OUTC
YX, FB_OUTT
1234Aâ06/13/06
tc(n)
tc(n+1)
tjit(cc) = tc(n) ± tc(n+1)
Figure 3. Cycle-to-Cycle Jitter
6
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