ICS95V842I Datasheet, PDF (1/9 Pages) Integrated Circuit Systems – DDR Phase Lock Loop Clock Driver (60MHz - 220MHz)

Integrated
Circuit
Systems, Inc.
ICS95V842I
DDR Phase Lock Loop Clock Driver (60MHz - 220MHz)
Recommended Application:
1:2 DDRI Clock Driver
Product Description/Features:
• Low skew, low jitter PLL clock driver
• Feedback pins for input to output synchronization
• Spread Spectrum tolerant inputs
• With bypass mode mux
• Operating frequency 60 to 220 MHz
Switching Characteristics:
• CYCLE - CYCLE jitter: <75ps
• OUTPUT - OUTPUT skew: <60ps
• Period jitter: ±75ps
• Half-Period jitter: ±75ps
Pin Configuration
VDD2.5 1
DDRT0 2
DDRC0 3
GND 4
CLK_INT 5
CLK_INC 6
AVDD 7
AGND 8
16 GND
15 DDRC1
14 DDRT1
13 VDD2.5
12 FB_INC
11 FB_INT
10 FB_OUTT
9 FB_OUTC
16 pin SSOP
Functionality
INPUTS
OUTPUTS
PLL State
AVDD CLK_INT CLK_INC CLKT CLKC FB_OUTT FB_OUTC
GND
L
H
L
H
L
H
Bypassed/Off
GND
H
L
HL
H
L
Bypassed/Off
2.5V
(nom)
L
H
L
H
L
H
On
2.5V
(nom)
H
L
HL
H
L
On
Block Diagram
FB_INT
FB_INC
CLK_INC
PLL
CLK_INT
FB_OUTT
FB_OUTC
DDRT (1:0)
DDRC (1:0)
AVDD
1234A—06/13/06