ICS9148-53 Datasheet, PDF (6/18 Pages) Integrated Circuit Systems – Frequency Generator & Integrated Buffers for Mother Boards

ICS9148 - 53
Serial Configuration Command Bitmap
Byte0: Functionality and Frequency Select Register (default = 0)
Bit
Bit 7
Bit
(2, 6:4)
Bit 3
Bit 1
Bit 0
Description
0 - ±0.25% Spread Spectrum Modulation
1 - ±0.6% Spread Spectrum Modulation
Bit (2, 6:4) CPU CLKs PCI CLKs AGP CLKs
1111
133
44.33
88.67
1110
124
41.33
82.67
1101
150
50
100
1100
140
46.67
93.33
1011
105
35
70
1010
112
37.33
74.67
1001
115
38.33
76.66
1000
120
40
80
0111
100
33.33
66.60
0110
95.25
31.75
63.50
0101
83.3
33.30
66.60
0100
75
30.00
60.00
0011
75
37.50
75.00
0010
68.5
34.25
68.50
0001
66.8
33.40
66.80
0000
60
30.00
60.00
0 - Frequency is selected by hardware select,
Latched Inputs
1 - Frequency is selected by Bit 6:4 (above)
0 - Normal
1 - Spread Spectrum Enabled (center spread)
0 - Running
1- Tristate all outputs
PWD
0
Note1
0
0
0
Note 1: Default at power-up will be for latched logic inputs to define frequency;
Bits 2, 6:4 are default to 000
Note: PWD = Power-Up Default
I²C is a trademark of Philips Corporation
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