ICS853031 Datasheet, PDF (6/19 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-9 DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER

Integrated
Circuit
Systems, Inc.
ICS853031
LOW SKEW, 1-TO-9
DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER
TABLE 4F. ECL DC CHARACTERISTICS (PCLK, nPCLK), V_CC = 0V; V_EE = -2.375V TO -3.465V
Symbol Parameter
-40°C
Min
Typ
Ma-
x
25°C
Min Typ Max
85°C
Min Typ
V_OH
V_OL
V_PP
V_CMR
Output High Voltage; NOTE 1
-1.125 -1.025 -0.92 -1.075 -1.005 -0.93 -1.08 -1.005
Output Low Voltage; NOTE 1
-1.895 -1.755 -1.62 -1.875 -1.78 -1.685 -1.86 -1.765
Peak-to-Peak Input Voltage
0.15 0.8
Input High Voltage
Common Mode Range; NOTE 2, 3
V_EE+1.2
1.3 0.15 0.8
0 V_EE+1.2
1.3 0.15 0.8
0 V_EE+1.2
PCLK
I_IH
Input High Current
nPCLK
150
150
10
10
PCLK
-10
-10
-10
I_IL
Input Low Current
nPCLK
-150
-150
-150
NOTE 1: Outputs terminated with 50Ω to V_CCO - 2V.
NOTE 2: Common mode voltage is defined as V_IH.
NOTE 3: For single-ended applications, the maximum input voltage for PCLK, nPCLK is V_CC + 0.3V.
Max
-0.935
-1.67
1.3
0
150
10
Units
V
V
V
V
µA
µA
µA
µA
TABLE
5.
AC
CHARACTERISTICS,
V
CC
=
0V;
V
EE
=
-2.375V
TO
-3.465V
OR
V
CC
=
2.375
TO
3.465V;
V
EE
=
0V
Symbol Parameter
-40°C
25°C
85°C
Units
Min Typ Max Min Typ Max Min Typ Max
f
Output Frequency
MAX
t
PD
Propagation
Delay; NOTE 1
PCLK, nPCLK
CLK, nCLK
>1.6
>1.6
>1.6
GHz
750 825 900 785 875 965 825 925 1025 ps
820 920 1020 860 960 1060 910 1010 1110 ps
tsk(o) Output Skew; NOTE 2, 4
20 55
20 55
25 55 ps
tsk(pp) Part-to-Part Skew; NOTE 3, 4
60 150
75 175
75 200 ps
t_R/t_F
Output
Rise/Fall Time
20% to 80%
100 215 400 100 225 400 100 215 350 ps
f ≤ 266MHz
48
odc
Output Duty Cycle
266MHz < f ≤ 500MHz 46
52 48
54 46
52 48
54 46
52 %
54 %
All parameters measured at ≤ 500MHz unless otherwise noted.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the output differential cross points.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal
load conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
853031AY
www.icst.com/products/hiperclocks.html
6
REV. B SEPTEMBER 16, 2004