ICS853031 Datasheet, PDF (2/19 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-9 DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER

Integrated
Circuit
Systems, Inc.
ICS853031
LOW SKEW, 1-TO-9
DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1
V_CC
Power
Core supply pin.
2
CLK
Input Pulldown Non-inverting differential clock input.
3
nCLK
Input Pullup Inverting differential clock input.
4
CLK_SEL
Input
Pulldown
Clock Select input. When HIGH, selects PCLK, nPCLK inputs.
When LOW, selects CLK, nCLK. LVTTL / LVCMOS interface levels.
5
PCLK
Input Pulldown Non-inverting differential LVPECL clock input.
6
nPCLK
Input Pullup Inverting differential LVPECL clock input.
7
8
9, 16, 17,
24, 25, 32
10, 11
V_EE
CLK_EN
V_CCO
nQ8, Q8
Power
Input
Power
Output
Pullup
Negative supply pin.
Synchronizing clock enable. When HIGH, clock outputs follow clock input.
When LOW, Q outputs are forced low, nQ outputs are forced high.
LVTTL / LVCMOS interface levels.
Output supply pins.
Differential output pair. LVPECL interface level.
12, 13
nQ7, Q7 Output
Differential output pair. LVPECL interface level.
14, 15
nQ6, Q6 Output
Differential output pair. LVPECL interface level.
18, 19
nQ5, Q5 Output
Differential output pair. LVPECL interface level.
20, 21
nQ4, Q4 Output
Differential output pair. LVPECL interface level.
22, 23
nQ3 Q3 Output
Differential output pair. LVPECL interface level.
26, 27
nQ2, Q2 Output
Differential output pair. LVPECL interface level.
28, 29
nQ1, Q1 Output
Differential output pair. LVPECL interface level.
30, 31
nQ0, Q0 Output
Differential output pair. LVPECL interface level.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
R_PULLDOWN
R_PULLUP
Parameter
Input Pulldown Resistor
Input Pullup Resistor
Test Conditions
Minimum
Typical
50
50
Maximum
Units
KΩ
KΩ
853031AY
www.icst.com/products/hiperclocks.html
2
REV. B SEPTEMBER 16, 2004