ICS8430I-61 Datasheet, PDF (6/16 Pages) Integrated Circuit Systems – 500MHZ, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER

Integrated
Circuit
Systems, Inc.
ICS8430I-61
500MHZ, CRYSTAL-TO-3.3V DIFFERENTIAL
LVPECL FREQUENCY SYNTHESIZER
TABLE 4C. LVPECL DC CHARACTERISTICS, V_CC = V_CCA = V_CCO = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical
V_OH
Output High Voltage; NOTE 1
V_CCO - 1.4
V_OL
Output Low Voltage; NOTE 1
V_CCO - 2.0
V
Peak-to-Peak Output Voltage Swing
0.6
SWING
NOTE 1: Outputs terminated with 50Ω to V_CCO - 2V. See "Parameter Measurement Information" section,
"3.3V Output Load Test Circuit" figure.
Maximum
V_CCO - 0.9
V_CCO - 1.7
1.0
Units
V
V
V
TABLE 5. INPUT FREQUENCY CHARACTERISTICS, V_CC = V_CCA = V_CCO = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
TEST_CLK; NOTE 1
f_IN
Input
Frequency
XTAL_IN XTAL_OUT NOTE 1
S_CLOCK
14
27
MHz
14
27
MHz
50
MHz
NOTE 1: For the input crystal and TEST_CLK frequency range, the M value must be set for the VCO to operate within
the 250MHz to 500MHz range. Using the minimum input frequency of 14MHz, valid values of M are 286 ≤ M ≤ 511.
Using the maximum input frequency of 27MHz, valid values of M are 149 ≤ M ≤ 296.
TABLE 6. CRYSTAL CHARACTERISTICS
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Test Conditions
Minimum Typical Maximum
Fundamental
14
27
50
7
Units
MHz
Ω
pF
TABLE
7.
AC
CHARACTERISTICS,
V
CC
=
V_CCA
=
V_CCO
=
3.3V±5%,
TA
=
-40°C
TO
85°C
Symbol Parameter
Test Conditions Minimum Typical Maximum
F_OUT
tjit(cc)
Output Frequency
Cycle-to-Cycle Jitter; NOTE 1, 4
20.83
500
N ≠ 1.5
30
N = 1.5
100
tjit(per) Period Jitter, RMS; NOTE 1, 3
6
tsk(o) Output Skew; NOTE 2, 4
15
t_R / t_F
Output Rise/Fall Time
20% to 80%
200
700
M, N to nP_LOAD
5
t_S
Setup Time
S_DATA to S_CLOCK
5
S_CLOCK to S_LOAD
5
M, N to nP_LOAD
5
t_H
Hold Time
S_DATA to S_CLOCK
5
S_CLOCK to S_LOAD
5
odc
Output Duty Cycle
Even N divides
48
52
Odd N divides
45
55
t
PLL Lock Time
1
LOCK
All AC parameters guaranteed for V_CC=V_CCA=V_CCO=3.3V ±5%.
NOTE 1: Jitter performance using XTAL inputs.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the output differential cross points.
NOTE 3: N divide = 1.5 characterized using the Wavecrest tailfit algorithm.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
Units
MHz
ps
ps
ps
ps
ps
ns
ns
ns
ns
ns
ns
%
%
ms
8430AYI-61
www.icst.com/products/hiperclocks.html
REV. A OCTOBER 21, 2004
6