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ICS97U2A845A Datasheet, PDF (5/13 Pages) Integrated Circuit Systems – 1.8V Low-Power Wide-Range Frequency Clock Driver
ICS97U2A8 45A
Advance Information
Recommended Operating Condition (see note1)
TA = 0 - 70°C; Supply Voltage AVDD, VDDQ = 1.8 V +/- 0.1V (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX UNITS
Supply Voltage
Low level input voltage
High level input voltage
DC input signal voltage
(note 2)
VDDQ, AVDD
1.7
1.8
1.9
V
CLK_INT, CLK_INC, FB_INC,
VIL FB_INT
0.35 x VDDQ V
OE, OS
0.35 x VDDQ V
VIH
CLK_INT, CLK_INC, FB_INC,
FB_INT
0.65 x VDDQ
V
OE, OS
0.65 x VDDQ
V
VIN
-0.3
VDDQ + 0.3
V
Differential input signal
voltage (note 3)
DC - CLK_INT, CLK_INC,
VID
FB_INC, FB_INT
AC - CLK_INT, CLK_INC,
0.3
0.6
FB_INC, FB_INT
VDDQ + 0.4
V
VDDQ + 0.4
V
Output differential cross-
voltage (note 4)
VOX
VDDQ/2 - 0.10
VDDQ/2 + 0.10 V
Input differential cross-
voltage (note 4)
VIX
VDDQ/2 - 0.15 VDD/2 VDDQ2 + 0.15 V
High level output current
IOH
Low level output current
IOL
Operating free-air
temperature
TA
-18
mA
18
mA
0
70
°C
1
A CLKT1
B CLKC1
C CLKC2
D CLKT2
E CLK_INT
F CLK_INC
G AGND
H AVDD
J CLKT3
K CLKC3
2
CLKT0
GND
GND
VD D Q
VD D Q
VD D Q
VD D Q
GND
GND
CLKC4
3
C LKC 0
GND
NB
VDDQ
NB
NB
VDDQ
NB
GND
CLKT4
4
CLKC5
GND
NB
VDDQ
NB
NB
VDDQ
NB
GND
CLKT9
5
CLKT5
GND
GND
OS
VDDQ
OE
VDDQ
GND
GND
C LKC 9
6
CLKT6
CLKC6
CLKC7
CLKT7
F B_ IN T
F B_ IN C
FB_O UTC
F B_O U T T
CLKT8
CLKC8
Notes:
1. Unused inputs must be held high or low to prevent them from floating.
2. DC input signal voltage specifies the allowable DC execution of differential input.
3. Differential inputs signal voltages specifies the differential voltage [VTR-VCP]
required for switching, where VTR is the true input level and VCP is the
complementary input level.
4. Differential cross-point voltage is expected to track variations of VDDQ and is the
voltage at which the differential signal must be crossing.
1202—06/30/06
5