ICS91857 Datasheet, PDF (5/14 Pages) Integrated Circuit Systems – Value SSTL_2 Clock Driver (60MHz - 220MHz)

ICS91857
Recommended Operating Condition for DDR200/266/333 (see note1)
T_A = 0 - 85°C; Supply Voltage AVDD, VDD = 2.5V ± 0.2V (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
Supply Voltage
V_DDQ, A_VDD
2.3
Low level input voltage
V_IL
CLKT, CLKC, FB_INC
PD#
-0.3
High level input voltage
CLKT, CLKC, FB_INC
V_IH
PD#
V_DDQ/2 + 0.18
1.7
DC input signal voltage
-0.3
(note 2)
Differential input signal
DC - CLKT, FB_INT
0.36
voltage (note 3)
V_ID
AC - CLKT, FB_INT
0.7
Output differential cross-
voltage (note 4)
V_OX
V_DDQ/2 - 0.15
Input differential cross-
voltage (note 4)
V_IX
V_DDQ/2 - 0.2
High level output
current
I_OH
MAX UNITS
2.7
V
V_DDQ/2 - 0.18 V
0.7
V
V
V_DDQ + 0.6
V
V_DDQ
V
V_DDQ + 0.6
V
V_DDQ + 0.6
V
V_DDQ/2 + 0.15 V
V_DDQ/2 + 0.2 V
0.12
mA
Low level output current
I_OL
12
mA
Input slew rate
S_R
1
Operating free-air
temperature
T_A
0
Notes:
1. Unused inputs must be held high or low to prevent them from floating.
2. DC input signal voltage specifies the allowable DC execution of differential input.
3. Differential inputs signal voltages specifies the differential voltage [VTR-VCP]
required for switching, where VT is the true input level and VCP is the
complementary input level.
4. Differential cross-point voltage is expected to track variations of V_CC and is the
voltage at which the differential signal must be crossing.
4
V/ns
70
°C
0494C—08/15/05
5