ICS9160-03 Datasheet, PDF (5/7 Pages) Integrated Circuit Systems – Frequency Generator and Integrated Buffer for PowerPC

ICS9160-03
Preliminary Product Preview
Electrical Characteristics at 3.3V
V_DD = 3.0 – 3.7 V
PARAMETER
Rise Time
Fall Time
Rise Time
Fall Time
Duty Cycle
Jitter, One Sigma
Jitter, Absolute
Jitter, One Sigma
Jitter, Absolute
Input Frequency
Clock Skew
Clock Skew
Clock Skew
SYMBOL
Tr¹
Tf¹
Tr¹
Tf¹
Dt¹
Tj1s¹
Tjab¹
Tj1s¹
Tjab¹
Fi¹
Tsk¹
Tsk¹
Tsk¹
AC Characteristics
TEST CONDITIONS
20pF load, 0.8 to 2.0V
20pF load, 2.0 to 0.8V
20pF load, 20% to 80%
20pF load, 80% to 20%
20pF load
PCLK & BCLK Clocks; Load=20pF,
FOUT>25 MHz
PCLK & BCLK Clocks; Load=20pF,
FOUT>25 MHz
Fixed CLK and BCLK < 25 MHz and Fixed
CLK; Load=20pF
Fixed CLK and BCLK < 25 MHz;
Load=20pF
PCLK to PCLK; Load=20pF; @1.4V
BCLK0 to other BCLK; Load=20pF; @1.4V
PCLK to BCLK; Load=20pF; @1.4V
MIN
-
-
-
-
40
-
-250
-3.0
-5.0
-
-250
-500
1
TYP
1.5
0.9
2
1.8
50
50
-
1
2
14.318
50
90
2.6
MAX
3
2
4.5
4.25
60
150
250
3.0
5.0
-
250
500
5
UNITS
ns
ns
ns
ns
%
ps
ps
%
%
MHz
ps
ps
ns
Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production.
Note 2: Jitter spectrum meets PowerPC PLL natural frequency in-band requirements of less than ±150ps.
5