ICS8602 Datasheet, PDF (5/10 Pages) Integrated Circuit Systems – ZERO DELAY, DIFFERENTIAL-TO-LVCMOS/LVTTL

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS8602
ZERO DELAY, DIFFERENTIAL-TO-LVCMOS/LVTTL
CLOCK GENERATOR
PARAMETER MEASUREMENT INFORMATION
V_DD, V_DDA, V_DDO = 1.65V±5%
LVCMOS
SCOPE
Qx
V_DD
nCLK
V
PP
CLK
Cross Points
V
CMR
GND = -1.65V±5%
3.3V OUTPUT LOAD AC TEST CIRCUIT
GND
DIFFERENTIAL INPUT LEVEL
Q0:Q8
V
DDO
2
V
DDO
2
V
DDO
2
Qx
tcycle n
➤
tcycle n+1
➤
t jit(cc) = tcycle n –tcycle n+1
Qy
1000 Cycles
V
DDO
2
V
DDO
2
t sk(o)
CYCLE-TO-CYCLE JITTER
Q0:Q8
V
DDO
2
Pulse Width
t
PERIOD
odc & t_PERIOD
odc = ^{t PW}
t _PERIOD
OUTPUT SKEW
20%
Clock Outputs
80%
t
R
OUTPUT RISE/FALL TIME
80%
t
F
20%
nCLK
CLK
nCLK
CLK
V_DD
FB_IN
2
➤ t (Ø)
t(Ø) mean = Static Phase Offset
(where t(Ø) is any random sample, and t(Ø) mean is the average
of the sampled cycles measured on controlled edges)
Q0:Q8
V_DDO
2
t
PD
STATIC PHASE OFFSET
8602BY
PROPAGATION DELAY
www.icst.com/products/hiperclocks.html
5
REV. F APRIL 16, 2003