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ICS8521I Datasheet, PDF (5/14 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-9 DIFFERENTIAL-TO-HSTL FANOUT BUFFER
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS8521I
LOW SKEW, 1-TO-9
DIFFERENTIAL-TO-HSTL FANOUT BUFFER
TABLE 4D. LVPECL DC CHARACTERISTICS, VDD = 3.3V±5%, VDDO = 1.8V±0.2V, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical
PCLK
IIH
Input High Current
nPCLK
VDD = VIN = 3.465V
VDD = VIN = 3.465V
IIL
PCLK
Input Low Current
nPCLK
VDD = 3.465V, VIN = 0V
VDD = 3.465V, VIN = 0V
-5
-150
VPP
Peak-to-Peak Input Voltage
0.3
VCMR
Common Mode Input Voltage;
NOTE 1, 2
1.5
NOTE 1: Common mode voltage is defined as VIH.
NOTE 2: For single ended applications, the maximum input voltage for PCLK and nPCLK is VDD + 0.3V.
Maximum
150
5
1
VDD
Units
µA
µA
µA
µA
V
V
TABLE 4E. HSTL DC CHARACTERISTICS, VDD = 3.3V±5%, VDDO = 1.8V±0.2V, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
VOH
Output High Voltage;
NOTE 1
V
OL
Output Low Voltage;
NOTE 1
VOX
VSWING
Output Crossover Voltage
Peak-to-Peak
Output Voltage Swing
NOTE 1: Outputs terminated with 50Ω to ground.
Minimum
1.0
0
40% x (VOH - VOL) + VOL
0.6
Typical
Maximum
1.4
0.4
60% x (VOH - VOL) + VOL
1.1
Units
V
V
V
V
TABLE 5. AC CHARACTERISTICS, VDD = 3.3V±5%, VDDO = 1.8V±0.2V, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum
fMAX
tPD
tsk(o)
Output Frequency
Propagation Delay; NOTE 1
Output Skew; NOTE 2, 4
IJ 250MHz
500
1.3
25
tsk(pp) Part-to-Part Skew; NOTE 3, 4
200
tR / tF
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80% @ 50MHz
300
700
50
All parameters measured at 250MHz unless noted otherwise.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
Measured from VDD/2 to the output differential crossing point for single ended input levels.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the output differential cross points.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages
and with equal load conditions. Using the same type of inputs on each device, the outputs are measured
at the differential cross points.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
Units
MHz
ns
ps
ps
ps
%
8521BYI
www.icst.com/products/hiperclocks.html
5
REV. A NOVEMBER 17, 2005