ICS843011C Datasheet, PDF (5/11 Pages) Integrated Circuit Systems – FEMTOCLOCKS-TM CRYSTAL-TO- 3.3V LVPECL CLOCK GENERATOR

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS843011C
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS843011C provides
separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V_CC and V_CCA
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required. Figure 1 illustrates how
a 10Ω resistor along with a 10μF and a .01μF bypass
capacitor should be connected to each V_CCA pin.
V_CC
V_CCA
3.3V
.01μF 10Ω
.01μF
10μF
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
The ICS843011C has been characterized with 18pF parallel
resonant crystals. The capacitor values, C1 and C2, shown in
Figure 2 below were determined using a 26.5625MHz, 18pF
parallel resonant crystal and were chosen to minimize the
ppm error. The optimum C1 and C2 values can be slightly
adjusted for different board layouts.
X1
18pF Parallel Crystal
XTAL_OUT
C1
33p
XTAL_IN
C2
22p
Figure 2. CRYSTAL INPUt INTERFACE
843011CG
www.icst.com/products/hiperclocks.html
5
REV. A JANUARY 25, 2006