9DMU0431 Datasheet, PDF (5/11 Pages) Integrated Circuit Systems – Spread Spectrum Compatible

9DMU0431 DATASHEET
Electrical Characteristics–Absolute Maximum Ratings
PARAMETER
SYMBOL
CONDITIONS
Supply Voltage
VDDx
Input Voltage
V_IN
Input High Voltage, SMBus V_IHSMB
Storage Temperature
Ts
SMBus clock and data pins
Junction Temperature
Tj
Input ESD protection
ESD prot
Human Body Model
1_{Guaranteed by design and characterization, not 100% tested in production.}
2 _{Operation under these conditions is neither implied nor guaranteed.}
3 _{Not to exceed 2.0V.}
MIN
-0.5
-0.5
-65
2000
TYP
MAX
2
V_DD+0.5
3.3
150
125
UNITS NOTES
V
1,2
V
1,3
V
1
°C
1
°C
1
V
1
Electrical Characteristics–Input/Supply/Common Parameters–Normal Operating
Conditions
TA = T_AMB, Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX UNITS NOTES
Supply Voltage
VDDx
Supply voltage for core and analog
Ambient Operating
Temperature
T_AMB
Industrial range
Input High Voltage
V_IH
Single-ended inputs, except SMBus
Input Low Voltage
V_IL
Single-ended inputs, except SMBus
Input Current
I_IN
Single-ended inputs, V_IN = GND, V_IN = VDD
Single-ended inputs
I_INP
V_IN = 0 V; Inputs with internal pull-up resistors
V_IN = VDD; Inputs with internal pull-down resistors
Input Frequency
F_in
Pin Inductance
L_pin
Capacitance
C_IN
C_{INDIF_IN}
Logic Inputs, except DIF_IN
DIF_IN differential clock inputs
C_OUT
Output pin capacitance
Clk Stabilization
T_STAB
From V_DD Power-Up and after input clock
stabilization or de-assertion of PD# to 1st clock
Input SS Modulation
Frequency PCIe
f_MODINPCIe
Allowable Frequency for PCIe Applications
(Triangular Modulation)
Input SS Modulation
Frequency non-PCIe
f_MODIN
Allowable Frequency for non-PCIe Applications
(Triangular Modulation)
OE# Latency
t_LATOE#
DIF start after OE# assertion
DIF stop after OE# deassertion
Tfall
t_F
Fall time of single-ended control inputs
Trise
t_R
Rise time of single-ended control inputs
1_{Guaranteed by design and characterization, not 100% tested in production.}
2_{Control input must be monotonic from 20% to 80% of input swing.}
3_{Time from deassertion until outputs are >200 mV}
4 _{DIF_IN input}
1.425
-40
0.75 V_DD
-0.3
-5
-200
1
1.5
1.5
30
0
1
1.5
1.575
V
25
85
°C
1
V_DD + 0.3 V
0.25 V_DD V
5
uA
200
uA
167
MHz
2
7
nH
1
5
pF
1
2.7
pF
1,4
6
pF
1
1
ms
1,2
33
kHz
66
kHz
3
clocks 1,3
5
ns
2
5
ns
2
REVISION A 09/24/14
5
2:4 1.5V PCIE GEN1-2-3 CLOCK MUX