ICS9248-97 Datasheet, PDF (4/14 Pages) Integrated Circuit Systems – Frequency Timing Generator for PENTIUM II Systems

ICS9248-97
Serial Configuration Command Bitmap
Byte 0: Functionality and frequency select register (Default = 0)
Bit
Bit
(2, 7:4)
Bit 2
FS4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Bit 7
FS3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Bit 6
FS2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Bit 5
FS1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Description
Bit 4
FS0
0
1
0
1
0
1
0
CPU
103.0
105.0
100.45
100.9
107.1
109.0
112.0
1
114.0
0
116.1
1
118.0
0
133.3
1
120.0
0
122.0
1
125.1
0
128.21
1
130.0
0
133.0
1
133.9
0
138.0
1
142.0
0
146.0
1
150.0
0
153.0
1
156.0
0
159.1
1
162.0
0
165.0
1
168.0
0
171.0
1
174.0
0
177.0
1
180.0
CPU/2
51.50
52.50
50.23
50.45
53.55
54.50
56.00
57.00
58.50
59.00
66.65
60.00
61.00
62.55
64.11
65.00
66.50
66.95
69.00
71.00
73.00
75.00
76.50
78.00
79.55
81.00
82.50
84.00
85.50
87.00
88.50
90.00
Bit 3
0 - Frequency is selected by hardware select, latched inputs
1 - Frequency is selected by Bit 2, 7:4
Bit 1
0 - Normal
1 - Spread spectrum enabled
Bit 0
0 - Running
1 - Tristate all outputs
PCI
34.33
35.00
33.48
33.63
35.70
36.33
37.33
38.00
38.70
39.33
33.33
40.00
40.67
41.70
42.74
43.33
44.33
33.48
34.50
35.50
36.50
37.50
38.25
39.00
39.78
40.50
41.25
42.00
42.75
43.50
44.25
45.00
3V66
68.67
70.00
66.97
67.27
71.40
72.67
74.67
76.00
77.40
78.67
66.65
80.00
81.33
83.40
85.47
86.67
88.67
66.95
69.00
71.00
73.00
75.00
76.50
78.00
79.55
81.00
82.50
84.00
85.50
87.00
88.50
90.00
IOAPIC
17.17
17.50
16.74
16.82
17.85
18.17
18.67
19.00
19.35
19.67
16.66
20.00
20.33
20.85
21.37
21.67
22.17
16.74
17.25
17.75
18.25
18.75
19.13
19.50
19.89
20.25
20.63
21.00
21.38
21.75
22.13
22.50
PWD
Reserved
Note 1
0
0
0
Note 1:
Default at power-up will be for latched logic inputs to define frequency.
4