ICS9248-96 Datasheet, PDF (4/12 Pages) Integrated Circuit Systems – Frequency Generator & Integrated Buffers for Celeron & PII/III™

ICS9248-96
Serial Configuration Command Bitmap
Byte0: Functionality and Frequency Select Register (default = 0)
Bit
Description
PWD
Bit (2, 7:4)
CPUCLK SDRAM
(MHz) (MHz)
3V66 PCICLK
(MHz) (MHz)
FREQ_IOAPIC
(MHz)
1
0
Spread Precentage
0 0 0 0 0 66.80 100.20 66.80 33.40 16.70 33.40 +/- 0.25% Center
0 0 0 0 1 68.00 102.00 68.00 34.00 17.00 34.00 +/- 0.25% Center
0 0 0 1 0 100.30 100.30 66.87 33.43 16.72 33.43 +/- 0.25% Center
0 0 0 1 1 103.00 103.00 68.67 34.33 17.17 34.33 +/- 0.25% Center
0 0 1 0 0 133.73 100.30 66.87 33.43 16.72 33.43 +/- 0.25% Center
0 0 1 0 1 145.00 108.75 72.50 36.25 18.13 36.25 +/- 0.25% Center
0 0 1 1 0 133.73 100.30 66.87 33.43 16.72 33.43 +/- 0.25% Center
0 0 1 1 1 137.33 103.00 68.67 34.33 17.17 34.33 +/- 0.25% Center
0 1 0 0 0 140.00 105.00 70.00 35.00 17.50 35.00 +/- 0.25% Center
0 1 0 0 1 140.00 140.00 93.33 46.67 23.33 46.67 +/- 0.25% Center
0 1 0 1 0 118.00 118.00 78.67 39.33 19.67 39.33 +/- 0.25% Center
0 1 0 1 1 124.00 124.00 82.67 41.33 20.67 41.33 +/- 0.25% Center
0 1 1 0 0 133.70 133.70 89.13 44.57 22.28 44.57 +/- 0.25% Center
0
Bit 2, ₀
Bit 7:4 ₀
1 1 0 1 137.00
1 1 1 0 150.00
1 1 1 1 72.50
137.00
112.50
108.75
91.33
75.00
72.50
45.67
37.50
36.25
22.83
18.75
18.13
45.67
37.50
36.25
+/- 0.25% Center
+/- 0.25% Center
+/- 0.25% Center
00011
Note1
1 0 0 0 0 75.00 112.50 75.00 37.50 18.75 37.50 +/- 0.25% Center
1 0 0 0 1 83.00
83.00 27.67 13.83 6.92 13.83 +/- 0.25% Center
1 0 0 1 0 110.00 110.00 73.33 36.67 18.33 36.67 +/- 0.25% Center
1 0 0 1 1 120.00 120.00 80.00 40.00 20.00 40.00 +/- 0.25% Center
1 0 1 0 0 125.00 125.00 83.33 41.67 20.83 41.67 +/- 0.25% Center
1 0 1 0 1 69.25 103.88 69.25 34.63 17.31 34.63 +/- 0.25% Center
1 0 1 1 0 70.00 105.00 70.00 35.00 17.50 35.00 +/- 0.25% Center
1 0 1 1 1 76.67 115.00 76.67 38.33 19.17 38.33 +/- 0.25% Center
1 1 0 0 0 145.00 145.00 96.67 48.33 24.17 48.33 +/- 0.25% Center
1 1 0 0 1 66.50
99.75 66.50 33.25 16.63 33.25 +/- 0.25% Center
1 1 0 1 0 150.00 150.00 100.00 50.00 25.00 50.00 +/- 0.25% Center*
1 1 0 1 1 99.75
99.75 66.50 33.25 16.63 33.25 +/- 0.25% Center*
1 1 1 0 0 155.00 155.00 103.33 51.67 25.83 51.67 +/- 0.25% Center
1 1 1 0 1 166.50 166.50 111.00 55.50 27.75 55.50 +/- 0.25% Center
1 1 1 1 0 153.33 115.00 76.67 38.33 19.17 38.33 +/- 0.25% Center
1 1 1 1 1 133.00 99.75 66.50 33.25 16.63 33.25 +/- 0.25% Center*
Bit 3
0 - Frequency is selected by hardware select, Latched Inputs
1 - Frequency is selected by Bit 2, 7:4
0
Bit 1
0 - Normal
1 - Spread Spectrum Enabled ± 0.25% Center Spread
1
Bit 0
0 - Running
1- Tristate all outputs
0
Note 1: Default at power-up will be for latched logic inputs to define frequency (Bit 3 = 0).
* These frequencies with spread enabled are equal to original Intel defined frequencies with -0.5% down spread.
I²C is a trademark of Philips Corporation
0311D—04/23/04
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