ICS9148-46 Datasheet, PDF (4/9 Pages) Integrated Circuit Systems – Pentium/ProTM System Clock Chip

ICS9148-46
Serial Bitmap
Byte 3: Functionality & Frequency Select
& Spread Slect Register
Bit
Description
PWD
7
0: Center Spread ±0.255%
1: Down Spread 0 to -0.6%
0
Bit
654
CPU
PCI
000
68.5
34.25
001
75.0
37.5
010
83.3
41.6
6:4
011
66.6
33.3
100
103
34.3
0
101
112
37.3
110
133.3
44.43
111
100
33.33
0 - Frequency is selected by
3
hardware select SEL100/66.6#
0
1 - Frequency is selected by 6:4 above
2
(Reserved)
00 - Normal operation
10
01 - Test mode
10 - Spread sprectrum ON
00
11 - Tristate all outputs
Notes: 1 = Enabled; 0 = Disabled, outputs held low
Byte 5:
Bit
Pin#
Pin Name
PWD
Description
Bit Value = 0 Bit Value = 1
7 5 PCICLK_F 1
Disabled
(low)
Enabled
6 10 PCICLK3 1
Disabled
(low)
Enabled
5 9 PCICLK2 1
Disabled
(low)
Enabled
4-
-
0 (Reserved) (Reserved)
3 7 PCICLK1 1
Disabled
(low)
Enabled
2 6 PCICLK0 1
Disabled
(low)
Enabled
1-
-
0 (Reserved) (Reserved)
0-
-
0 (Reserved) (Reserved)
Notes: 1 = Enabled; 0 = Disabled, outputs held low
Byte 4:
Bit
Pin#
Pin Name
PWD
Description
Bit Value = 0 Bit Value = 1
7-
-
-
(Reserved) (Reserved)
6-
-
-
(Reserved) (Reserved)
5-
-
-
(Reserved) (Reserved)
4-
-
-
(Reserved) (Reserved)
3-
-
-
(Reserved) (Reserved)
2 23 CPUCLK1 1
Disabled
(low)
Enabled
1-
-
0
(Reserved) (Reserved)
0 24 CPUCLK0 1
(Disabled)
(low)
Enabled
Notes: 1 = Enabled; 0 = Disabled, outputs held low
Note: PWD = Power-Up Default
Byte 6:
Bit
Pin#
Pin Name PWD
Description
Bit Value = 0 Bit Value = 1
7-
-
0 (Reserved) (Reserved)
6-
-
0 (Reserved) (Reserved)
5-
-
0 (Reserved) (Reserved)
4-
-
0 (Reserved) (Reserved)
3-
-
0 (Reserved) (Reserved)
2 26 REF1
1
(Disabled)
(low)
Enabled
1-
-
0 (Reserved) (Reserved)
0 28 REF0
1
(Disabled)
(low)
Enabled
Notes: 1 = Enabled; 0 = Disabled, outputs held low
4