ICS9147-09 Datasheet, PDF (4/9 Pages) Integrated Circuit Systems – Frequency Generator & Integrated Buffers for 686 Series CPUs

ICS9147- 09
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5V to V_DD +0.5V
Ambient Operating Temperature . . . . . . . . . . . . 0°C to +70°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are
stress specifications only and functional operation of the device at these or any other conditions above those listed in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect product reliability.
Electrical Characteristics at 3.3V
V_DD = 3.0 – 3.7 V, T_A = 0 – 70° C unless otherwise stated
PARAMETER
Input Low Voltage
Input High Voltage
Input Low Current
Input High Current
Output Low Current
Output High Current
Output Low Current
Output High Current
Output Low Voltage
Output High Voltage
Output Low Voltage
Output High Voltage
Supply Current
Power Down Current
Pull-up Resistor
SYMBOL
VIL
VIH
IIL
IIH
IOL1a
IOL1b
IOH1a
IOH1b
IOL2
IOH2
VOL1a
VOL1b
VOH1a
VOH1b
VOL2
VOH2
IDD
Ipd
Rpu
DC Characteristics
TEST CONDITIONS
Latched inputs and Fulltime inputs
Latched inputs and Fulltime inputs
VIN = 0V (Fulltime inputs)
VIN=VDD (Fulltime inputs)
VOL = 0.8V; CPU, SDRAM IOAPIC, REF,
BUS; VDD2 = 3.3V
VOL = 0.8V; CPUL, IOAPIC; VDD2 = 2.5V
VOH = 2.0V; CPU, SDRAM IOAPIC, REF,
BUS; VDD2 = 3.3V
VOH = 2.0V; CPUL, IOAPIC; VDD2 = 2.5V
VOL = 0.8V; for fixed 24, 48
VOH = 2.0V; for fixed 24, 48
IOL = 10mA; CPU, SDRAM IOAPIC REF,
BUS;VDD2 = 3.3V
IOL = 10mA; CPUL, IOAPIC; VDD2=2.5V
IOH = -10mA; CPU, SDRAM, IOAPIC,
REF, BUS; VDD = 3.3V
IOH = -10mA; CPUL, IOAPIC; VDD2=2.5V
IOL = 8mA; for fixed 24, 48MHz CLKs
IOH = -8mA; for fixed 24, 48MHz CLKs
@66.6 MHz; all outputs unloaded
PD#=0
CPUSTOP#; PD#
MIN
-
0.7VDD
-28.0
-5.0
19.0
19.0
-
16.0
-
-
2.4
1.95
-
2.4
-
-
20
Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production.
TYP
-
-
-10.5
-
30.0
30.0
-26.0
-12.5
25.0
-22.0
0.3
0.3
2.8
2.1
0.3
2.8
120
5.0
40
MAX
0.2VDD
-
-
5.0
-
-16.0
-9.5
-
-14.0
0.4
0.4
-
0.4
-
180
20.0
80
UNITS
V
V
µA
µA
mA
mA
mA
mA
mA
mA
V
V
V
V
V
V
mA
µA
Kohms
4