ICS854054 Datasheet, PDF (4/13 Pages) Integrated Circuit Systems – DIFFERENTIAL-TO-LVDS CLOCK MULTIPLEXER

Integrated
Circuit
Systems, Inc.
ICS854054
4:1
DIFFERENTIAL-TO-LVDS CLOCK MULTIPLEXER
TABLE 4D. LVDS DC CHARACTERISTICS, V_DD = 3.3V ± 5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
V_OD
Δ V_OD
V_OS
Δ V_OS
Differential Output Voltage
V Magnitude Change
OD
Offset Voltage
V_OS Magnitude Change
Minimum
250
1.125
Typical
450
1.25
Maximum
525
50
1.375
50
Units
mV
mV
V
mV
TABLE
5.
AC
CHARACTERISTICS,
V
DD
=
3.135V
TO
3.465V,
TA
=
-40°C
TO
85°C
Symbol
Parameter
Test Conditions
Minimum Typical Maximum
f_MAX
Output Frequency
t_PD
Propagation Delay; NOTE 1
tjit
Buffer Additive Phase Jitter, RMS;
refer to Additive Phase Jitter
Section
155.52 MHz,
(12kHz - 20MHz)
2.8
325
700
0.195
tsk(pp)
Part-to-Part Skew; NOTE 2, 3
375
tsk(i)
Input Skew
90
t_R / t_F
Output Rise/Fall Time
MUX_ISOLATION MUX Isolation
20% to 80%
50
250
155.52MHz,
Input Peak-to-Peak = 800mV
-50
All parameters measured up to 1.5MHz unless noted otherwise.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs on different devices operating at the same supply voltages
and with equal load conditions. Using the same type of inputs on each device, the outputs are measured
at the differential cross points.
NOTE 3: This parameter is defined according with JEDEC Standard 65.
Units
GHz
ps
ps
ps
ps
ps
dB
854054AG
www.icst.com/products/hiperclocks.html
4
REV. A MARCH 29, 2006