ICS8530I-01 Datasheet, PDF (4/17 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS8530I-01
LOW SKEW, 1-TO-16
DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER
TABLE 5. AC CHARACTERISTICS, V_CC = V_CCO = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum
f_MAX
t_PD
tsk(o)
Output Frequency
Propagation Delay; NOTE 1
Output Skew; NOTE 2, 4
500
1.35
50
tsk(pp) Part-to-Part Skew; NOTE 3, 4
100
106.25MHz, 25°C
Integration Range: 12KHz to 20MHz
tjit
Buffer Additive Phase Jitter,
RMS; refer to Additive Phase
Jitter Section
106.25MHz, 85°C
Integration Range: 12KHz to 20MHz
212.5MHz, 25°C
Integration Range: 12KHz to 20MHz
212.5MHz, 85°C
Integration Range: 12KHz to 20MHz
0.022
0.026
0.033
0.034
t_R
Output Rise Time
t_F
Output Fall Time
odc
Output Duty Cycle
20% to 80% @ 50MHz
20% to 80% @ 50MHz
300
700
300
700
50
All parameters measured at 250MHz unless noted otherwise.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the output differential cross points.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages
and with equal load conditions. Using the same type of inputs on each device, the outputs are measured
at the differential cross points.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
Units
MHz
ns
ps
ps
ps
ps
ps
ps
ps
ps
%
8530DYI-01
www.icst.com/products/hiperclocks.html
4
REV. A FEBRUARY 25, 2005