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ICS844001I Datasheet, PDF (4/10 Pages) Integrated Circuit Systems – FEMTOCLOCKS™ CRYSTAL-TO- LVDS CLOCK GENERATOR
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS844001I
FEMTOCLOCKS™CRYSTAL-TO- LVDS
CLOCK GENERATOR
TABLE 3E. LVDS DC CHARACTERISTICS, VDD = VDDA = 2.5V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum
VOD
Differential Output Voltage
Δ VOD
VOD Magnitude Change
VOS
Offset Voltage
Δ VOS
VOS Magnitude Change
NOTE: Please refer to Parameter Measurement Information for output information.
Typical
350
40
1.25
50
Maximum
Units
mV
mV
V
mV
TABLE 4. CRYSTAL CHARACTERISTICS
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Drive Level
Test Conditions
Minimum Typical Maximum
Fundamental
20.4
28.3
50
7
1
Units
MHz
Ω
pF
mW
TABLE 5A. AC CHARACTERISTICS, VDD = VDDA = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
fOUT
tjit(Ø)
Output Frequency
RMS Phase Jitter ( Random);
NOTE 1
106.25MHz @ Integration Range:
637kHz - 10MHz
187.5MHz @ Integration Range:
637kHz - 10MHz
212.5MHz @ Integration Range:
637kHz - 10MHz
tR / tF
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
NOTE 1: Please refer to the Phase Noise Plots following this section.
Minimum Typical Maximum Units
81.66
226.66 MHz
0.74
ps
0.48
ps
0.70
ps
260
ps
50
%
TABLE
5B.
AC
CHARACTERISTICS,
V
DD
=
V
DDA
=
2.5V±5%,
TA
=
-40°C
TO
85°C
Symbol Parameter
Test Conditions
fOUT
tjit(Ø)
Output Frequency
RMS Phase Jitter ( Random);
NOTE 1
106.25MHz @ Integration Range:
637kHz - 10MHz
187.5MHz @ Integration Range:
637kHz - 10MHz
212.5MHz @ Integration Range:
637kHz - 10MHz
tR / tF
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
NOTE 1: Please refer to the Phase Noise Plots following this section.
Minimum Typical Maximum Units
81.66
226.66 MHz
0.97
ps
0.58
ps
0.95
ps
260
ps
50
%
844001AGI
www.icst.com/products/hiperclocks.html
4
REV. A JUNE 16, 2005