ICS601-25 Datasheet, PDF (4/5 Pages) Integrated Circuit Systems – LOW PHASE NOISE 1 TO 5 CLOCK MULTIPLIER

ICS601-25
LOW PHASE NOISE 1 TO 5 CLOCK MULTIPLIER
DC Electrical Characteristics (continued)
Parameter
Input High Voltage
Input Low Voltage
Output High Voltage, CMOS
level
Output High Voltage
Output Low Voltage
Operating Supply Current
Short Circuit Current
Input Capacitance
Output Impedance
On Chip Pull-up Resistor
On Chip Pull-down Resistor
Symbol Conditions
V_IH
V_IL
V_OH
I_OH = -4 mA
Min.
2
VDD-0.4
V_OH
V_OL
IDD
I_OS
Z_OUT
R_PU
R_PD
I_OL = -12 mA
I_OL = 12 mA
No load, 125 MHz
Each output
Select pins
S2, S1, S0, PD
pins
S3 pin
2.4
± 40
Typ.
45
± 60
5
20
510
240
Max.
VDD
0.8
Units
V
V
V
V
0.4
V
60
mA
mA
pF
Ω
kΩ
kΩ
AC Electrical Characteristics
VDD = 3.3V ±10%, Ambient Temperature -40 to +85° C
Parameter
Symbol
Conditions
Input Frequency
Output Frequency
At 3.3V
Output Rise Time
Output Fall Time
Output Clock Duty Cycle
t_OR 0.8 to 2.0 V, Note 1
t_OF 0.8 to 2.0 V, Note 1
At VDD/2, Note 1
Maximum Absolute jitter, short
term, 125 MHz
Note 1
Maximum jitter, one sigma, 125
MHz (x5)
Note 1
Phase Noise, relative to carrier,
125 MHz (x5)
100 Hz offset
Phase Noise, relative to carrier,
125 MHz (x5)
1 kHz
Phase Noise, relative to carrier,
125 MHz (x5)
10 kHz offset
Phase Noise, relative to carrier,
125 MHz (x5)
100 kHz offset
Output to Output Skew
25M in, 125M out,
Note 1
Note 1: Measured with 15 pF load
Min.
10
45
Typ.
50
±50
Max.
27
156
1.5
1.5
55
±75
Units
MHz
MHz
ns
ns
%
ps
18 25
ps
-90 -95
dBc/Hz
-115 -120
dBc/Hz
-118 -123
dBc/Hz
-115 -120
dBc/Hz
250 ps
MDS 601-25 C
4
Revision 071505
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