ICS162835 Datasheet, PDF (4/7 Pages) Integrated Circuit Systems – 18-Bit 3.3V Registered Buffer

ICS162835
Advance Information
Electrical Characteristics - DC
T_A = 0 - 70° C; V_DD = 3.3 ± 0.3V, V_DDQ=3.3 ± 0.3V; (unless otherwise stated)
SYMBOL
PARAMETERS
CONDITIONS
V_DD (V)
V_IH HIGH-level input voltage
3.0 - 3.6
V_IL LOW-level input voltage
3.0 - 3.6
V_OH HIGH-level output voltage I_OH = -12 mA, V_IH = 2.0V
3.0
V_OL Low-level output voltage
I_OL = 12 mA, V_IL = 0.8V
3.0
I_I Input leakage current
V_I = V_DD or GND
3.0 - 3.6
I_OZ Off-state leakage current
V_O = V_DD or GND#, OE = V_DD
I_DD Quiescent Supply Current V_I = V_DD or GND, I_O = 0
* Parameters are characterized over recommended operating conditions.
MIN TYP MAX UNITS
2.0
V
0.8
V
2.2
V
0.8
±10 µA
±20 µA
±40 µA
Critical Register Specifications*
SYMBOL
PARAMETERS
CONDITION
V_DD (V)
MIN
TYP
MAX UNITS
t_PD**
t_PD**
t_S
Propagation Delay (CK to Y)
Propagation Delay (CK to Y)
Setup time (A before CK)
R_L = 500 Ω, C_L = 50 pF
R_L = 500 Ω, C_L = 30 pF
3.0 - 3.6 1.4
3.0 - 3.6 0.7
3.0 - 3.6 1.0
3.5
ns
2.5
ns
ns
t_H Hold time (A after CK)
3.0 - 3.6 0.6
ns
C_I Clock input capacitance
3.0 - 3.6 3.3
4.0
6.0
pF
* Parameters are characterized over recommended operating conditions.
** The t_PD value in this table would equate to the 'Time-to-Vm' delay described in the post register timing specifications of the
PC133 registered DIMM Specification. The first value applies to DIMMs with nine SDRAM loads per register output, and the
second to DIMMs with eighteen SDRAM loads per register output. These values should serve as only an initial starting point,
0713—09/23/02
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