ICS889874 Datasheet, PDF (3/14 Pages) Integrated Circuit Systems – DIFFERENTIAL-TO-LVPECL BUFFER/DIVIDER

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS889874
1:2
DIFFERENTIAL-TO-LVPECL BUFFER/DIVIDER
TABLE 3A. CONTROL INPUT FUNCTION TABLE
Inputs
Outputs
nRESET
Selected Source
Q0, Q1
nQ0, nQ1
0
IN, nIN
Disabled; LOW
Disabled; HIGH
1
IN, nIN
Enabled
Enabled
NOTE: After nRESET switches, the clock outputs are disabled or enabled following a
falling input clock edge as shown in Figure 1.
nRESET
IN
nIN
V_IN
nQ
Q
V_CC/2
t_RR
t_PD
V_OUT Swing
FIGURE 1. nRESET TIMING DIAGRAM (WHEN S2 = 1)
TABLE 3B. TRUTH TABLE
Inputs
nRESET S2
S1
S0
Outputs
1
0
X
X Reference Clock (pass through)
1
1
0
0
Reference Clock ÷2
1
1
0
1
Reference Clock ÷4
1
1
1
0
Reference Clock ÷8
1
1
1
1
Reference Clock ÷16
0
1
X
X
Q = LOW, nQ = HIGH
Clock Disable; (NOTE 1)
0
0
X
X
Q = LOW, nQ = HIGH
Clock Disable; (NOTE 1)
NOTE 1: Reset/Disable function is asserted on the next clock input
(IN/nIN) high-to-low transition.
889874AK
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3
REV. A MAY 19, 2004