ICS889874 Datasheet, PDF (2/14 Pages) Integrated Circuit Systems – DIFFERENTIAL-TO-LVPECL BUFFER/DIVIDER

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS889874
1:2
DIFFERENTIAL-TO-LVPECL BUFFER/DIVIDER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1, 2
Q0, nQ0 Output
Differential output pair. LVPECL / ECL interface levels.
3, 4
Q1, nQ1 Output
Differential output pair. LVPECL / ECL interface levels.
5, 15, 16 S2, S1, S0 Input Pullup Select pins. LVCMOS/LVTTL interface levels.
6
nc
Unused
No connect.
7, 14
8
V_CC
nRESET
Power
Input
Pullup
Positive supply pins.
Synchronizing enable/disable pin. When LOW, resets the divider. When
HIGH, unconnected. Input threshold is V_CC/2V. Includes a 37kΩ pull-up
resistor. LVTTL / LVCMOS interface levels.
9
nIN
Input
Inverting differential LVPECL clock input.
10
V_{REF_AC}
Output
11
V_T
Input
12
IN
Input
Reference voltage for AC-coupled applications.
Termination input.
Non-inverting LVPECL differential clock input.
13
V_EE
Power
Negative supply pin.
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol Parameter
R_PULLUP Input Pullup Resistor
Test Conditions
Minimum
Typical
37
Maximum Units
KΩ
889874AK
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2
REV. A MAY 19, 2004