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ICS84330C Datasheet, PDF (3/19 Pages) Integrated Circuit Systems – 700MHZ, LOW JITTER, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
Integrated
Circuit
Systems, Inc.
ICS84330C
700MHZ, LOW JITTER, CRYSTAL-TO-3.3V
DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
TABLE 1. PIN DESCRIPTIONS
Name
Type
Description
VCCA
XTAL1, XTAL2
Power
XTAL_SEL
Input
Pullup
Analog supply pin.
Crystal oscillator interface. XTAL1 is an oscillator input.
XTAL2 is an oscillator output.
Selects between the crystal oscillator or FREF_EXT inputs as the PLL reference
source. Selects XTAL inputs when HIGH. Selects FREF_EXT when LOW.
LVCMOS / LVTTL interface levels.
OE
Input Pullup Output enable. LVCMOS / LVTTL interface levels.
nP_LOAD
M0, M1, M2
M3, M4, M5
M6, M7, M8
N0, N1
Input
Input
Input
Pullup
Pullup
Pullup
Parallel load input. Determines when data present at M8:M0 is loaded into
M divider, and when data present at N1:N0 sets the N output divide value.
LVCMOS / LVTTL interface levels.
M divider inputs. Data latched on LOW-to-HIGH transition of nP_LOAD input.
LVCMOS / LVTTL interface levels.
Determines N output divider value as defined in Table 3C Function Table.
LVCMOS / LVTTL interface levels.
V
EE
TEST
Power
Output
Negative supply pins.
Test output which is used in the serial mode of operation.
Single-ended LVPECL interface levels.
VCC
Power
nFOUT, FOUT Output
Core supply pins.
Differential output for the synthesizer. 3.3V LVPECL interface levels.
nc
Unused
No connect.
FREF_EXT
Input Pulldown PLL reference input. LVCMOS / LVTTL interface levels.
S_CLOCK
Input
Pulldown
Clocks the serial data present at S_DATA input into the shift register on the
rising edge of S_CLOCK. LVCMOS / LVTTL interface levels.
S_DATA
Input
Pulldown
Shift register serial input. Data sampled on the rising edge of S_CLOCK.
LVCMOS / LVTTL interface levels.
S_LOAD
Input
Pulldown
Controls transition of data from shift register into the M divider.
LVCMOS / LVTTL interface levels.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
CIN
RPULLUP
RPULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
pF
KΩ
KΩ
84330CV
www.icst.com/products/hiperclocks.html
3
REV. B DECEMBER 7, 2004