English
Language : 

ICS843001-21 Datasheet, PDF (3/15 Pages) Integrated Circuit Systems – FEMTOCLOCKS™ CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
Integrated
Circuit
Systems, Inc.
ICS843001-21
FEMTOCLOCKS™ CRYSTAL-TO-3.3V LVPECL
FREQUENCY SYNTHESIZER
TABLE 3A. COMMON CONFIGURATIONS TABLE
Input
Reference Clock
27
24.75
14.8351649
19.44
19.44
19.44
19.44
19.53125
25
25
25
25
25
26.5625
26.5625
26.5625
31.25
M Divider Value N Divider Value
22
8
24
8
40
8
32
4
32
8
32
1
32
2
32
4
25
5
25
10
24
6
24
4
24
8
24
6
24
3
24
4
18
3
VCO (MHz)
594
594
593.4066
622.08
622.08
622.08
622.08
625
625
625
600
600
600
637.5
637.5
637.5
562.5
Output Frequency
(MHz)
74.25
74.25
74.1758245
155.52
77.76
622.08
311.04
156.25
125
62.5
100
150
75
106.25
212.5
159.375
187.5
Application
HDTV
HDTV
HDTV
SONET
SONET
SONET
SONET
10 GigE
1 GigE
1 GigE
PCI Express
SATA
SATA
Fibre Channel 1
4 Gig Fibre Channel
10 Gig Fibre Channel
12 Gig Ethernet
TABLE 3B. PROGRAMMABLE M OUTPUT DIVIDER
FUNCTION TABLE
Inputs
M Divider
Input Frequency
M2 M1 M0 Value Minimum Maximum
000
18
31.1
38.9
00 1
22
25.5
31.8
0 10
24
23.3
29.2
0 11
25
22.4
28.0
10 0
32
17.5
21.9
10 1
40
14.0
17.5
TABLE 3C. PROGRAMMABLE N OUTPUT DIVIDER
FUNCTION TABLE
Inputs
N2 N1 N0
000
00 1
0 10
0 11
10 0
10 1
1 10
111
N Divide Value
1
2
3
4
5
6
8
10
TABLE 3D. BYPASS MODE FUNCTION TABLE
Inputs
SEL1 SEL0
0
0
0
1
1
0
1
1
Reference
XTAL0
XTAL1
TEST_CLK
TEST_CLK
PLL Mode
Active
Active
Active
Bypass
843001AG-21
www.icst.com/products/hiperclocks.html
3
REV. A OCTOBER 26, 2005