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ICS843001-21 Datasheet, PDF (2/15 Pages) Integrated Circuit Systems – FEMTOCLOCKS™ CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
Integrated
Circuit
Systems, Inc.
ICS843001-21
FEMTOCLOCKS™ CRYSTAL-TO-3.3V LVPECL
FREQUENCY SYNTHESIZER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1
VCCO_CMOS
Power
Output supply pin for LVCMOS output.
2, 3
N0, N1
Input Pullup Output divider select pins. Default ÷4.
4
N2
Input Pulldown LVCMOS/LVTTL interface levels.
5
VCCO_LVPECL
Power
6, 7
Q0, nQ0 Ouput
Output supply pin for LVPECL output.
Differential output pair. LVPECL interface levels.
8, 23
9
10
11
12
13
14
VEE
VCCA
VCC
XTAL_OUT1,
XTAL_IN1
XTAL_OUT0,
XTAL_IN0
Power
Power
Power
Input
Input
Negative supply pin.
Analog supply pin.
Core supply pin.
Parallel resonant crystal interface. XTAL_OUT1 is the output,
XTAL_IN1 is the input.
Parallel resonant crystal interface. XTAL_OUT0 is the output,
XTAL_IN0 is the input.
15
TEST_CLK Input Pulldown LVCMOS/LVTTL clock input.
16, 17
18
19, 20
21
SEL0, SEL1
MR
M0, M1
M2
Input
Input
Input
Input
Pulldown Input MUX select pins. LVCMOS/LVTTL interface levels.
Pulldown
Active HIGH Master Reset. When logic HIGH, the internal dividers are
reset causing the true output Q0 to go low and the inverted output nQ0
to go high. When logic LOW, the internal dividers and the outputs are
enabled. LVCMOS/LVTTL interface levels.
Pulldown Feedback divider select pins. Default ÷32.
Pullup LVCMOS/LVTTL interface levels.
22
REF_OE
Input
Pulldown
Reference clock output enable. Default Low.
LVCMOS/LVTTL interface levels.
24
REF_CLK Output
Reference clock output. LVCMOS/LVTTL interface levels.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
CIN
RPULLDOWN
RPULLUP
Rout
Parameter
Input Capacitance
Input Pulldown Resistor
Input Pullup Resistor
Output Impedance
Test Conditions
Minimum
Typical
4
51
51
7
Maximum
Units
pF
kΩ
kΩ
Ω
843001AG-21
www.icst.com/products/hiperclocks.html
2
REV. A OCTOBER 26, 2005