ICS650-05 Datasheet, PDF (3/4 Pages) Integrated Circuit Systems – HDTV Clock Synthesizer

PRELIMINARY INFORMATION
ICS650-05
HDTV Clock Synthesizer
Electrical Specifications
Parameter
Conditions
ABSOLUTE MAXIMUM RATINGS (note 1)
Minimum
Supply voltage, VDD
Referenced to GND
Inputs and Clock Outputs
Referenced to GND
-0.5
Ambient Operating Temperature
0
Soldering Temperature
Max of 10 seconds
Storage temperature
-65
DC CHARACTERISTICS (VDD = 3.3V or 5V unless noted)
Operating Voltage, VDD
3.0
Input High Voltage, VIH
FRS, OE
2
Input Low Voltage, VIL
FRS, OE
Output High Voltage, VOH
VDD=3.3V, IOH=-8mA 2.4
Output Low Voltage, VOL
VDD=3.3V, IOL=8mA
Output High Voltage, VOH, VDD = 3.3 or 5V IOH=-8mA
VDD-0.4
Operating Supply Current, IDD, at 5V
No Load
Operating Supply Current, IDD, at 3.3V
No Load
Short Circuit Current, VDD = 3.3 V
Each output
Input Capacitance
Except X1
AC CHARACTERISTICS (VDD = 3.3V or 5V unless noted)
Input Crystal or Clock Frequency
Output Clocks Accuracy (synthesis error)
All clocks
Output Clock Rise Time
0.8 to 2.0V
Output Clock Fall Time
2.0 to 0.8V
Output Clock Duty Cycle
At VDD/2
40
One Sigma Jitter, ACLK
VDD= 3.3 V
VDD= 5.0 V
Absolute Clock Period Jitter
VDD= 3.3 V
VDD= 5.0 V
Typical
26
14
±50
7
27
50
100
40
±300
±200
Maximum Units
7
V
VDD+0.5 V
70
°C
260
°C
150
°C
5.5
V
V
0.8
V
V
0.4
V
V
mA
mA
mA
pF
MHz
1
ppm
1.5
ns
1.5
ns
60
%
ps
ps
ps
ps
Notes: 1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged
exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.
External Components
A minimum number of external components are required for proper operation. A decoupling capacitor of
0.01 µF should be connected between VDD and GND on pins 4 and 6, and 16 and 14, and a 33 Ω
terminating resistor may be used on each clock output if the trace is longer than 1 inch.
MDS 650-05 A
3
Revision 081199
Printed 12/4/00
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