ICS873033 Datasheet, PDF (2/16 Pages) Integrated Circuit Systems – HIGH SPEED, ÷4 DIFFERENTIAL-TO- 3.3V, 5V LVPECL/ECL CLOCK GENERATOR

Integrated
Circuit
Systems, Inc.
ICS873033
HIGH SPEED, ÷4 DIFFERENTIAL-TO-
3.3V, 5V LVPECL/ECL CLOCK GENERATOR
TABLE 1. PIN DESCRIPTIONS
Number Name
Type
Description
1
RESET
Input Pulldown Reset pin. Single-ended 100h LVPECL interface levels.
2
PCLK
Input Pulldown Clock input. Default LOW when left floating. LVPECL interface levels.
3
nPCLK
Input Pulldown Clock input. LVPECL interface levels.
4
V_BB
Output
5
V_EE
Power
6, 7
nQ, Q
Output
Bias voltage.
Negative supply pin.
Differential output pair. LVPECL interface levels.
8
V_CC
Power
Positive supply pin.
NOTE: Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol Parameter
R_PULLDOWN Input Pulldown Resistor
Test Conditions
Minimum Typical Maximum Units
75
kΩ
TABLE 3. TRUTH TABLE
Inputs
PCLK nPCLK RESET
X
X
LH
LH
HL
L
LH = LOW to HIGH transistion
HL = HIGH to LOW transistion
Outputs
Q
nQ
L
H
÷4
÷4
PCLK
RESET
Q
t_RR
t_PW
FIGURE 1. TIMING DIAGRAM
873033AM
www.icst.com/products/hiperclocks.html
2
REV. A OCTOBER 19, 2005