ICS84427 Datasheet, PDF (2/13 Pages) Integrated Circuit Systems – CRYSTAL-TO-LVDS INTEGRATED FREQUENCY SYNTHESIZER/FANOUT BUFFER

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS84427
CRYSTAL-TO-LVDS
INTEGRATED FREQUENCY SYNTHESIZER/FANOUT BUFFER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1, 2
Q0, nQ0 Output
Differential output pair. LVDS interface levels.
3, 4
Q1, nQ1 Output
Differential output pair. LVDS interface levels.
5, 6
Q2, nQ2 Output
Differential output pair. LVDS interface levels.
7, 8
Q3, nQ3 Output
Differential output pair. LVDS interface levels.
9, 10
Q4, nQ4 Output
Differential output pair. LVDS interface levels.
11, 12
Q5, nQ5 Output
Differential output pair. LVDS interface levels.
13, 16, 24
14
15
V_DD
GND
PLL_SEL
Power
Input
Pullup
Core supply pins.
Power supply ground.
Selects between the PLL and crystal inputs as the input to the dividers.
When HIGH, selects PLL. When LOW, selects XTAL_IN and
XTAL_OUT. LVCMOS / LVTTL interface levels.
17
V_DDA
Power
Analog supply pin.
18
F_SEL2
Input Pullup Feedback frequency select pin. LVCMOS/LVTTL interface levels.
19,
20
XTAL_OUT,
XTAL_IN
Input
Crystal oscillator interface. XTAL_IN is the input,
XTAL_OUT is the output.
Active High Master Reset. When logic HIGH, the internal dividers are
21
MR
Input
Pulldown
reset causing the true outputs Qx to go low and the inverted outputs
nQx to go high. When logic LOW, the internal dividers and the outputs
are enabled. LVCMOS / LVTTL interface levels.
22
F_SEL1
Input Pulldown Output frequency select pin. LVCMOS/LVTTL interface levels.
23
F_SEL0
Input Pullup Output frequency select pin. LVCMOS/LVTTL interface levels.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
C_IN
R_PULLUP
R
PULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
pF
kΩ
kΩ
84427CM
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2
REV. D NOVEMBER 30, 2005