ICS83940-01 Datasheet, PDF (2/11 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-18 LVCMOS FANOUT BUFFER

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS83940-01
LOW SKEW, 1-TO-18
LVCMOS FANOUT BUFFER
TABLE 1. PIN DESCRIPTIONS
Number
1, 2, 12, 17, 25
3
4
5
6
7
8, 16, 21, 29
9, 10, 11, 13, 14,
15, 18, 19, 20, 22,
23, 24, 26, 27, 28,
30, 31, 32
Name
GND
LVCMOS_CLK
CLK_SEL
CLK
nCLK
VDDI
VDDO
Q17, Q16, Q15, Q14, Q13,
Q12, Q11, Q10, Q9, Q8,
Q7, Q6, Q5, Q4, Q3,
Q2, Q1, Q0
Type
Description
Power
Output power supply ground. Connect to ground.
Input Pulldown Clock input. LVCMOS interface levels.
Input
Input
Input
Pulldown
Pulldown
Pullup
Clock select input. Select LVCMOS clock input
when HIGH. Selects LVPECL clock inputs when
LOW.
Non-inverting differential clock input. Any differential
inteface levels.
Inverting differential clock input. Any differential
inteface levels.
Power
Input power supply. Connect to 3.3V or 2.5V.
Power
Output power supply. Connect to 3.3V or 2.5V.
Output
Clock outputs. 23Ω typical output impedance.
LVCMOS interface levels
TABLE 2. PIN CHARACTERISTICS
Symbol
CIN
Parameter
Input
Capacitance
CLK0, nCLK0,
LVCMOS_CLK
CLK_SEL
CPD
Power Dissipation Capacitance
(per output)
RPULLUP
RPULLDOWN
ROUT
Input Pullup Resistor
Input Pulldown Resistor
Output Impedance
Test Conditions
VDDI, VDDO = 3.465V
VDDI = 3.465V,
VDDO = 2.625V
VDDI, VDDO = 2.625V
Minimum Typical Maximum Units
4
pF
4
pF
pF
pF
pF
51
KΩ
51
KΩ
23
Ω
83940AY-01
www.icst.com/products/hiperclocks.html
2
REV. A JULY 31, 2001