ICS8344-01 Datasheet, PDF (2/16 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER

Integrated
Circuit
Systems, Inc.
ICS8344-01
LOW SKEW, 1-TO-24
DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1, 2, 5, 6
7, 8, 11, 12
Q16, Q17, Q18, Q19
Q20, Q21, Q22, Q23
Output
Q16 thru Q23 outputs. 7Ω typical output impedance.
3, 9, 28,
34, 39, 45
4, 10, 14,18,
27, 33, 40, 46
13
15, 19
16
V_DDO
GND
CLK_SEL
V_DD
nCLK1
Power
Output supply pins. Connect 3.3V or 2.5V.
Power
Input
Power
Input
Power supply ground. Connect to ground.
Clock select input. When HIGH, selects CLK1, nCLK inputs,
Pulldown When LOW, selects CLK0, nCLK0 inputs.
LVCMOS / LVTTL interface levelss.
Positive supply pins. Connect 3.3V or 2.5V.
Pullup Inverting differential LVPECL clock input.
17
CLK1
Input Pulldown Non-inverting differential LVPECL clock input.
20
nCLK0
Input Pullup Inverting differential LVPECL clock input.
21
CLK0
Input Pulldown Non-inverting differential LVPECL clock input.
22
CLK_EN
Input
Pullup
Synchronizing control for enabling and disabling clock outputs.
LVCMOS interface levels.
23
OE
Input
Pullup
Output enable. Controls enabling and disabling of outputs
Q0 thru Q23.
24
nc
Unused
No connect.
25, 26, 29, 30
31, 32, 35, 36
Q0, Q1, Q2, Q3
Q4, Q5, Q6, Q7
Output
Q0 thru Q7 outputs. 7Ω typical output impedance.
37, 38, 41, 42 Q8, Q9, Q10, Q11
43, 44, 47, 48 Q12, Q13, Q14, Q15
Output
Q8 thru Q15 outputs. 7Ω typical output impedance.
NOTE: Pullup and Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
C_IN
Parameter
Input Capacitance
CLK0, nCLK0,
CLK1, nCLK1
CLK-SEL,
CLK_EN, OE
C_PD
Power Dissipation Capacitance
(per output)
R_PULLUP
R_PULLDOWN
R_OUT
Input Pullup Resistor
Input Pulldown Resistor
Output Impedance
Test Conditions
Minimum Typical Maximum Units
4
pF
4
pF
pF
pF
pF
51
KΩ
51
KΩ
7
Ω
8344AY-01
www.icst.com/products/hiperclocks.html
2
REV. B AUGUST 6, 2001