ICS950410 Datasheet, PDF (12/15 Pages) Integrated Circuit Systems – AMD - K System Clock Chip

ICS950410
Advance Information
Electrical Characteristics - CPUCLKK8T/C K8 3.3V Push Pull Differential Pair
PARAMETER
SYMBOL
CONDITIONS*
MIN
TYP
MAX
UNITS
Rising Edge Rate
Falling Edge Rate
δV/δt At CPU's test load. 0 V +/- 400
2
δV/δt
mV (diffential measurment)
2
10
V/ns
10
V/ns
Differential Voltage
V_DIFF
0.4
2.3
V
Change in V_{DIFF_DC} Magnitude
Common Mode Voltage
Change in Common Mode
Voltage
Jitter, Cycle to cycle
∆ V_DIFF
V_CM
∆ V_CM
t_jcyc-cyc
At CPU's test load. (single-
ended measurement)
Measurement from differential
wavefrom
-150
1.05
-200
0
150
mV
1.45
V
200
mV
200
ps
Jitter, Accumulated
Duty Cycle
t_ja
-1000
d_t3
Measurement from differential
wavefrom
45
1000
55
%
Output Impedance
Average value during switching
R_ON transition. Used for determining
15
series termination value.
55
Ω
Group Skew
Measurement from differential
t_skew
wavefrom
*TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-5%
1_{Guaranteed by design and characterization, not 100% tested in production.}
2 _{All accumulated jitter specifications are guaranteed assuming that REF is at 14.31818MHz}
3 _{Spread Spectrum is off}
250
ps
NOTES
1
1
1
1
1
1
1
1,2,3
1
1
1
Electrical Characteristics - HTTCLK
PARAMETER
SYMBOL
CONDITIONS*
MIN
Output Impedance
Output High Voltage
Output Low Voltage
Output High Current
Output Low Current
Edge Rate
Z_O
V_O = V_X
12
V_OH1
I_OH = -1 mA
2.4
V_OL1
I_OL = 1 mA
I_OH1
V_OH = 2.0 V
I_OL1
V_OL = 0.8 V
10
t_slewr/f
Rise/Fall edge rate between
20% 60%
1
Rise Time
t_r
V_OL = 0.4 V, V_OH = 2.4 V
0.5
Fall Time
t_f
V_OH = 2.4 V, V_OL = 0.4 V
0.5
Duty Cycle
d_t1
V_T = 50%
45
Group Skew
t_skew
V_T = 1.5 V
Jitter, Cycle-to-cycle
t_jcyc-cyc2B
V_T = 1.5 V
*TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-5%
1_{Guaranteed by design and characterization, not 100% tested in production.}
TYP
MAX
UNITS NOTES
55
Ω
1
V
1
0.4
V
1
-15
mA
1
mA
1
4
V/ns
1
2
ns
1
2
ns
1
55
%
1
150
ps
1
250
ps
1
0888—04/06/04
12