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ICS853054 Datasheet, PDF (12/15 Pages) Integrated Circuit Systems – 4:1, DIFFERENTIAL-TO-3.3V OR 2.5V LVPECL/ECL CLOCK MULTIPLEXER
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS853054
4:1, DIFFERENTIAL-TO-3.3V OR 2.5V
LVPECL/ECL CLOCK MULTIPLEXER
3. Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load.
LVPECL output driver circuit and termination are shown in Figure 5.
VCC
Q1
VOUT
RL
50
VCC - 2V
FIGURE 5. LVPECL DRIVER CIRCUIT AND TERMINATION
To calculate worst case power dissipation into the load, use the following equations which assume a 50Ω load, and a termination
voltage of V - 2V.
CC
• For logic high, V = V
=V
– 1.005V
OUT
OH_MAX
CC_MAX
(V
- V ) = 1.005
CC_MAX OH_MAX
• For logic low, V = V
=V
– 1.78V
OUT
OL_MAX
CC_MAX
(V
- V ) = 1.78V
CC_MAX OL_MAX
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(V
– (V - 2V))/R ] * (V - V ) = [(2V - (V
- V ))/R ] * (V - V ) =
OH_MAX
CC_MAX
L
CC_MAX OH_MAX
CC_MAX OH_MAX
L
CC_MAX OH_MAX
[(2V - 1.005V)/50Ω] * 1.005V = 20mW
Pd_L = [(V – (V - 2V))/R ] * (V
- V ) = [(2V - (V
- V ))/R ] * (V - V ) =
OL_MAX
CC_MAX
L
CC_MAX OL_MAX
CC_MAX OL_MAX
L
CC_MAX OL_MAX
[(2V - 1.78V)/50Ω] * 1.78V = 7.83mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 27.83mW
853054AG
www.icst.com/products/hiperclocks.html
12
REV. A JANUARY 5, 2006