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ICS853058 Datasheet, PDF (11/15 Pages) Integrated Circuit Systems – 8:1, DIFFERENTIAL-TO-3.3V OR 2.5V LVPECL/ECL CLOCK MULTIPLEXER
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS853058
8:1, DIFFERENTIAL-TO-
3.3V OR 2.5V LVPECL/ECL CLOCK MULTIPLEXER
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS853058.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS853058 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for VCC = 3.3V ± 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
• Power (core)MAX = VCC_MAX * IEE_MAX = 3.465V * 38mA = 131.67mW
• Power (outputs)MAX = 30.94mW/Loaded Output pair
If all outputs are loaded, the total power is 1 * 30.94mW = 30.94mW
Total Power (3.465V, with all outputs switching) = 131.67mW + 30.94mW = 162.61mW
_MAX
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockSTM devices is 125°C.
The equation for Tj is as follows: Tj = θJA * Pd_total + TA
Tj = Junction Temperature
θJA = junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θJA must be used. Assuming a
moderate air flow of 1 meter per second and a multi-layer board, the appropriate value is 65°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.163W * 65°C/W = 95.6°C. This is well below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
TABLE 6. THERMAL RESISTANCE θJA FOR 24-PIN TSSOP FORCED CONVECTION
θJA by Velocity (Meters per Second)
Multi-Layer PCB, JEDEC Standard Test Boards
0
70°C/W
1
65°C/W
2.5
62°C/W
853058AG
www.icst.com/products/hiperclocks.html
11
REV. A APRIL 13, 2004